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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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FM24CL64B 데이터시트(PDF) 9 Page - Ramtron International Corporation |
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FM24CL64B 데이터시트(HTML) 9 Page - Ramtron International Corporation |
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9 / 12 page  FM24CL64B - 64Kb 3V I2C F-RAM (Automotive Temp.) Rev. 1.1 June 2011 Page 9 of 12 AC Parameters (TA = -40 C to + 125 C, VDD =3.0V to 3.6V unless otherwise specified) Symbol Parameter Min Max Min Max Min Max Units Notes fSCL SCL Clock Frequency 0 100 0 400 0 1000 kHz 1 tLOW Clock Low Period 4.7 1.3 0.6 s tHIGH Clock High Period 4.0 0.6 0.4 s tAA SCL Low to SDA Data Out Valid 3 0.9 0.55 s tBUF Bus Free Before New Transmission 4.7 1.3 0.5 s tHD:STA Start Condition Hold Time 4.0 0.6 0.25 s tSU:STA Start Condition Setup for Repeated Start 4.7 0.6 0.25 s tHD:DAT Data In Hold 0 0 0 ns tSU:DAT Data In Setup 250 100 100 ns tR Input Rise Time 1000 300 300 ns 2 tF Input Fall Time 300 300 100 ns 2 tSU:STO Stop Condition Setup 4.0 0.6 0.25 s tDH Data Output Hold (from SCL @ VIL) 0 0 0 ns tSP Noise Suppression Time Constant on SCL, SDA 50 50 50 ns Notes: All SCL specifications as well as start and stop conditions apply to both read and write operations. 1. The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from DC to fSCL (max). 2. This parameter is periodically sampled and not 100% tested. Capacitance (TA = 25 C, f=1.0 MHz, VDD = 3.3V) Symbol Parameter Min Max Units Notes CI/O Input/Output Capacitance (SDA) - 8 pF 1 CIN Input Capacitance - 6 pF 1 Notes 1. This parameter is periodically sampled and not 100% tested. Power Cycle Timing VDD min. VDD SDA,SCL tVR tPD tPU tVF Power Cycle Timing (TA = -40 C to +125 C, VDD = 3.0V to 3.6V) Symbol Parameter Min Max Units Notes tPU Power Up (VDD min) to First Access (Start condition) 10 - ms tPD Last Access (Stop condition) to Power Down (VDD min) 0 - s tVR VDD Rise Time 30 - s/V 1 tVF VDD Fall Time 100 - s/V 1 Notes 1. Slope measured at any point on VDD waveform. |
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