전자부품 데이터시트 검색엔진 |
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FM28V100 데이터시트(PDF) 8 Page - Ramtron International Corporation |
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FM28V100 데이터시트(HTML) 8 Page - Ramtron International Corporation |
8 / 13 page FM28V100 - 128Kx8 FRAM Rev. 1.2 May 2010 Page 8 of 13 Read Cycle AC Parameters (TA = -40 ° C to +85° C, CL = 30 pF, unless otherwise specified) VDD 2.0 to 2.7V VDD 2.7 to 3.6V Symbol Parameter Min Max Min Max Units Notes tRC Read Cycle Time 105 - 90 - ns tCE Chip Enable Access Time - 70 - 60 ns tAA Address Access Time - 105 - 90 ns tOH Output Hold Time 20 - 20 - ns tAAP Page Mode Address Access Time - 40 - 30 ns tOHP Page Mode Output Hold Time 3 - 3 - ns tCA Chip Enable Active Time 70 - 60 - ns tPC Precharge Time 35 - 30 - ns tAS Address Setup Time (to /CE1, CE2 active) 0 - 0 - ns tAH Address Hold Time (/CE-controlled) 70 - 60 - ns tOE Output Enable Access Time - 25 - 15 ns tHZ Chip Enable to Output High-Z - 10 - 10 ns 1 tOHZ Output Enable High to Output High-Z - 10 - 10 ns 1 Write Cycle AC Parameters (TA = -40 ° C to +85° C, unless otherwise specified) VDD 2.0 to 2.7V VDD 2.7 to 3.6V Symbol Parameter Min Max Min Max Units Notes tWC Write Cycle Time 105 - 90 - ns tCA Chip Enable Active Time 70 - 60 - ns tCW Chip Enable to Write Enable High 70 - 60 - ns tPC Precharge Time 35 - 30 - ns tPWC Page Mode Write Enable Cycle Time 40 - 30 - ns tWP Write Enable Pulse Width 22 - 18 - ns tAS Address Setup Time (to /CE1, CE2 active) 0 - 0 - ns tAH Address Hold Time (/CE-controlled) 70 - 60 - ns tASP Page Mode Address Setup Time (to /WE low) 8 - 5 - ns tAHP Page Mode Address Hold Time (to /WE low) 20 - 15 - ns tWLC Write Enable Low to Chip Disabled 30 - 25 - ns tWLA Write Enable Low to A(16:3) Change 30 - 25 - ns tAWH A(16:3) Change to Write Enable High 105 - 90 - ns tDS Data Input Setup Time 20 - 15 - ns tDH Data Input Hold Time 0 - 0 - ns tWZ Write Enable Low to Output High Z - 10 - 10 ns 1 tWX Write Enable High to Output Driven 5 - 5 - ns 1 tWS Write Enable to CE-Active Setup Time 0 - 0 - ns 1,2 tWH Write Enable to CE-Inactive Hold Time 0 - 0 - ns 1,2 Notes 1 This parameter is characterized but not 100% tested. 2 The relationship between CE’s and /WE determines if a /CE- or /WE-controlled write occurs. Power Cycle Timing (TA = -40 ° C to +85° C, VDD = 2.0V to 3.6V unless otherwise specified) Symbol Parameter Min Max Units Notes tVR VDD Rise Time 50 - µs/V 1 tVF VDD Fall Time 100 - µs/V 1 tPU Power Up (VDD min) to First Access Time 250 - µs tPD Last Access to Power Down (VDD min) 0 - µs Notes 1 Slope measured at any point on VDD waveform. |
유사한 부품 번호 - FM28V100_10 |
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유사한 설명 - FM28V100_10 |
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