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CD-700-SYNCE-25M0000000 데이터시트(PDF) 10 Page - Vectron International, Inc |
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CD-700-SYNCE-25M0000000 데이터시트(HTML) 10 Page - Vectron International, Inc |
10 / 11 page Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page 10 of 11 Table 7. Pin Functions Pin Symbol Function 1 OPOUT Op-Amp Output 2 OPN Op-Amp Negative Input 3 PHO Phase detector Output 4 LOSIN INPUT (Used with LOS) Logic 0, VCXO control voltage is enabled. Logic 1, VCXO control voltage (pin 16) is disabled and OUT1 and OUT2 are within +/-75 ppm of center frequency Has Internal pull-down resistor 5 DATAIN Phase detector Input signal (TTL switching thresholds) 6 CLKIN Phase detector Clock signal (TTL switching thresholds) 7 GND Cover and Electrical Ground 8 LOS OUTPUT (Used with LOSIN) Logic 1 if there are no transitions detected at DATAIN after 256 clock cycles at CLKIN. As soon as a transi- tion occurs at DATAIN, LOS is set to a logic low. Logic 0 = Input frequency detected 9 RCLK Recovered Clock 10 RDATA Recovered Data 11 OUT2 Divided-down VCXO Output, or Disabled 12 HIZ INPUT Logic 0, OUT1, OUT2, RCLK, RDATA are set to a high impedance state. Logic 1, OUT1, OUT2, RCLK, RDATA are active. Has Internal pull-up resistor 13 OUT1 VCXO Output 14 V DD Power Supply Voltage (3.3 V ±10% or 5.0 V ±10%) 15 OPP Op-Amp Positive Input 16 V C VCXO Control Voltage Figure 12. Outline Diagram Rev: 15Dec2009 |
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