전자부품 데이터시트 검색엔진 |
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STK672-040-E 데이터시트(PDF) 9 Page - Sanyo Semicon Device |
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STK672-040-E 데이터시트(HTML) 9 Page - Sanyo Semicon Device |
9 / 19 page STK672-040-E No. 5227-9/19 Input Signal Functions and Timing • CLK (phase switching clock) 1) Input frequency range: DC to 50kHz 2) Minimum pulse width: 10 μs 3) Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.) 4) Pin circuit type: Built-in pull-up resistor (20k Ω, typical) CMOS Schmitt trigger structure 5) Built-in multi-stage noise rejection circuit 6) Function: - When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge. - When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle. CLK Input Acquisition Timing (M3 = Low) • CWB (Method for setting the rotation direction) 1) Pin circuit type: Built-in pull-up resistor (20k Ω, typical) CMOS Schmitt trigger structure 2) Function: - When CWB is low: The motor turns in the clockwise direction. - When CWB is high: The motor turns in the counterclockwise direction. 3) Notes: When M3 is low, the CWB input must not be changed for about 6.25 μs before or after a rising or falling edge on the CLK input. • RETURN (Forcible return to the origin for the currently excited phase) 1) Pin circuit type: Built-in pull-up resistor (20k Ω, typical) CMOS Schmitt trigger structure 2) Built-in noise rejection circuit 3) Notes: The currently excited (driven) phase can be forcibly moved to the origin by switching this input from low to high. Normally, if this input is unused, it must be left open or connected to VCC2. • ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold as the internal state of this hybrid IC.) 1) Pin circuit type: Built-in pull-up resistor (20k Ω, typical) CMOS Schmitt trigger structure 2) Function: - When ENABLE is high or open: Normal operating state - When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is forcibly turned off. In this mode, the hybrid IC system clock is stopped and no inputs other than the reset input have any effect on the hybrid IC state. Excitation counter up/down Control output switching timing CLK input System clock Phase excitation counter clock Control output timing A06845 |
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유사한 설명 - STK672-040-E |
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