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ADF4151 데이터시트(PDF) 4 Page - Analog Devices |
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ADF4151 데이터시트(HTML) 4 Page - Analog Devices |
4 / 28 page ADF4151 Data Sheet Rev. B | Page 4 of 28 Parameter B Version Unit Conditions/Comments Min Typ Max NOISE CHARACTERISTICS Normalized In-Band Phase Noise Floor (PNSYNTH)3 −221 dBc/Hz PLL loop BW = 500 kHz (ABP = 3 ns) Normalized 1/f Noise (PN1_f)4 −118 dBc/Hz 10 kHz offset. Normalized to 1 GHz (ABP = 3 ns) Normalized In-Band Phase Noise Floor (PNSYNTH)3 −220 dBc/Hz PLL loop BW = 500 kHz (ABP = 6 ns); low noise mode Normalized 1/f Noise (PN1_f)4 −115 dBc/Hz 10 kHz offset; normalized to 1 GHz (ABP = 6 ns); low noise mode Spurious Signals Due to PFD Frequency5 −107 dBc PFD = 25 MHz 1 AC coupling ensures AVDD/2 bias. 2 TA = 25°C; AVDD = DVDD = 3.6 V; prescaler = 4/5; fREFIN = 130 MHz; fPFD = 26 MHz; fRF = 1.742 GHz. 3 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value) and 10 log FPFD. PNSYNTH = PNTOT – 10 log fPFD – 20 log N 4 The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (fRF) and at a frequency offset (f) is given by PN = P1_f + 10 log(10 kHz/f) + 20 log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL 5 Spurious measured on EVAL-ADF4151EB1Z with RF buffer between VCO output and RF input by-passed, using a Rohde & Schwarz FSUP signal source analyzer. |
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