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SL4051B 데이터시트(PDF) 1 Page - System Logic Semiconductor

부품명 SL4051B
상세설명  Analog Multiplexer Demultiplexer
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제조업체  SLS [System Logic Semiconductor]
홈페이지  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL4051B 데이터시트(HTML) 1 Page - System Logic Semiconductor

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SL4051B
System Logic
Semiconductor
SLS
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The SL4051B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if VCC - GND = 3V, a
VCC - VEE of up to 13 V can be controlled; for VCC - VEE level differences
above 13V a VCC - GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full VCC -GND and VCC - VEE supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The SL4051B is a single 8-channel multiplexer having three binary
control inputs, A,B and C, and an ENABLE input. The three binary
signals select 1 of 8 channels to be turned on, and connect one of the 8
inputs to the output.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25
°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4051BN Plastic
SL4051BD SOIC
TA = -55
° to 125° C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Control Inputs
ON
Enable
Select
Channels
C
B
A
L
L
L
L
X0
L
L
L
H
X1
L
L
H
L
X2
L
L
H
H
X3
L
H
L
L
X4
L
H
L
H
X5
L
H
H
L
X6
L
H
H
H
X7
H
X
X
X
None
X = don’t care
LOGIC DIAGRAM
Single-Pole, 8-Position Plus Common Off
PIN 16 =VCC
PIN 7 = VEE
PIN 8 = GND


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