CDCEL913-Q1

SCAS888 – SEPTEMBER 2009

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DESCRIPTION

The CDCE913 and CDCEL913 are modular PLL-based low-cost, high-performance, programmable clock

synthesizers, multipliers, and dividers. They generate up to three output clocks from a single input frequency.

Each output can be programmed in-system for any clock frequency up to 230 MHz, using the integrated

configurable PLL.

CDCE913.

The input accepts an external crystal or LVCMOS clock signal. If an external crystal is used, an on-chip load

capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF.

Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external

control signal, that is, PWM signal.

The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, BlueTooth,

Ethernet, GPS) or interface (USB, IEEE1394, Memory Stick) clocks from, for example, a 27-MHz reference input

frequency.

The PLL supports SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking which is

a common technique to reduce electro-magnetic interference (EMI).

Based on the PLL frequency and the divider settings, the internal loop filter components are automatically

adjusted to achieve high stability and optimized jitter transfer characteristic.

The device supports non-volatile EEPROM programming for ease customization of the device to the application.

re-programmed to a different application configuration before PCB assembly, or re-programmed by in-system

programming. All device settings are programmable through SDA/SCL bus, a 2-wire serial interface.

Three programmable control inputs, S0, S1 and S2, can be used to select different frequencies, or change SSC

setting for lowering EMI, or other control features like, outputs disable to low, outputs 3-state, power down, PLL

bypass, etc).

The CDCx913 operates in a 1.8-V environment. It operates in a temperature range of –40°C to 85°C.

PACKAGE

ORDERABLE PART NUMBER

TOP-SIDE MARKING

–40°C to 85°C

TSSOP – PW

Reel of 2000

CDCEL913IPWRQ1

CEL913Q

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

2

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Product Folder Link(s): CDCEL913-Q1