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CDCLVD1212RHAT 데이터시트(PDF) 5 Page - Texas Instruments |
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CDCLVD1212RHAT 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 20 page CDCLVD1212 www.ti.com SCAS901B – SEPTEMBER 2010 – REVISED JANUARY 2011 ELECTRICAL CHARACTERISTICS (continued) At VCC = 2.375V to 2.625V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LVDS OUTPUT CHARACTERISTICS |VOD| Differential output voltage magnitude 250 450 mV Change in differential output voltage ΔVOD –15 15 mV magnitude VIN, DIFF, PP = 0.3V, RL = 100 Ω Steady-state common mode output VOC(SS) 1.1 1.375 V voltage Steady-state common mode output ΔVOC(SS) VIN, DIFF, PP = 0.6V, RL = 100 Ω –15 15 mV voltage Vring Output overshoot and undershoot Percentage of output amplitude VOD 10% VOS Output ac common mode VIN, DIFF, PP = 0.6V, RL = 100 Ω 40 70 mVPP IOS Short-circuit output current VOD = 0 V ±24 mA tPD Propagation delay VIN, DIFF, PP = 0.3 V 1.5 2.5 ns tSK, PP Part-to-part skew 600 ps tSK, O Output skew 50 ps Crossing-point-to-crossing-point tSK,P Pulse skew(with 50% duty cycle input) –50 50 ps distortion Random additive jitter (with 50% duty Edge speed 0.75 V/ns, ps, tRJIT 0.3 cycle input) 10 kHz – 20 MHz RMS tR/tF Output rise/fall time 20% to 80%, 100 Ω, 5 pF 50 300 ps ICCSTAT Static supply current Outputs unterminated, f = 0 Hz 17 28 mA ICC100 Supply current All outputs, RL = 100 Ω, f = 100 MHz 85 110 mA ICC800 Supply current All outputs, RL = 100 Ω, f = 800 MHz 117 146 mA VAC_REF CHARACTERISTICS VAC_REF Reference output voltage VCC = 2.5 V, Iload = 100 µA 1.1 1.25 1.35 V Typical Additive Phase Noise Characteristics for 100 MHz Clock PARAMETER MIN TYP MAX UNIT phn100 Phase noise at 100 Hz offset -132.9 dBc/Hz phn1k Phase noise at 1 kHz offset -138.8 dBc/Hz phn10k Phase noise at 10 kHz offset -147.4 dBc/Hz phn100k Phase noise at 100 kHz offset -153.6 dBc/Hz phn1M Phase noise at 1 MHz offset -155.2 dBc/Hz phn10M Phase noise at 10 MHz offset -156.2 dBc/Hz phn20M Phase noise at 20 MHz offset -156.6 dBc/Hz tRJIT Random additive jitter from 10 kHz to 20 MHz 171 fs, RMS Typical Additive Phase Noise Characteristics for 737.27 MHz Clock PARAMETER MIN TYP MAX UNIT phn100 Phase noise at 100 Hz offset -80.2 dBc/Hz phn1k Phase noise at 1 kHz offset -114.3 dBc/Hz phn10k Phase noise at 10 kHz offset -138 dBc/Hz phn100k Phase noise at 100 kHz offset -143.9 dBc/Hz phn1M Phase noise at 1 MHz offset -145.2 dBc/Hz phn10M Phase noise at 10 MHz offset -146.5 dBc/Hz phn20M Phase noise at 20 MHz offset -146.6 dBc/Hz tRJIT Random additive jitter from 10 kHz to 20 MHz 65 fs, RMS Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): CDCLVD1212 |
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