SMJ320C31, SMJ320LC31, SMQ320LC31

DIGITAL SIGNAL PROCESSORS

SGUS026G − APRIL 1998 − REVISED SEPTEMBER 2006

10

POST OFFICE BOX 1443

Peripheral Bus

Memory-Mapped Registers

(6K Words Internal)

Reset, Interrupt, Trap Vector, and

Reserved Locations (64)

(External STRB Active)

0h

03Fh

040h

External

STRB Active

(8M Words − 64 Words)

7FFFFFh

Reserved

(32K Words)

800000h

807FFFh

808000h

8097FFh

RAM Block 0

(1K Words Internal)

809800h

809BFFh

809C00h

809FFFh

80A000h

External

STRB Active

(8M Words − 40K Words)

FFFFFFh

0h

FFFh

1000h

7FFFFFh

Reserved

(32K Words)

800000h

807FFFh

Peripheral Bus

Memory-Mapped Registers

(6K Words Internal)

808000h

8097FFh

RAM Block 0

(1K Words Internal)

809800h

809BFFh

809C00h

809FFFh

80A000h

External

STRB Active

(8M Words −

40K Words)

FFFFFFh

Boot 1

Boot 2

400000h

RAM Block 1

(1K Words − 63 Words Internal)

809FC0h

809FC1h

User-Program Interrupt

and Trap Branches

(63 Words Internal)

Boot 3

FFF000h

External

STRB

Active

(8M Words −

4K Words)

Reserved for Boot-Loader

Operations

(a) Microprocessor Mode

(b) Microcomputer/Boot-Loader Mode

RAM Block 1

(1K Words Internal)

† Figure 1 depicts the memory map for the SMJ320C31. See the TMS320C3x Users Guide (literature number SPRU031) for a detailed description

of this memory mapping.

Figure 1. SMJ320C31 Memory Map

Not Recommended for New Designs