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SST31LF041 데이터시트(PDF) 5 Page - Silicon Storage Technology, Inc |
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SST31LF041 데이터시트(HTML) 5 Page - Silicon Storage Technology, Inc |
5 / 26 page Data Sheet 4 Mbit Flash + 1 Mbit or 256 Kbit SRAM ComboMemory SST31LF041 / SST31LF041A / SST31LF043 / SST31LF043A 5 ©2001 Silicon Storage Technology, Inc. S71107-03-000 5/01 349 which returns the device to the Read operation. Please note that the software-reset command is ignored during an internal Program or Erase operation. See Table 4 for soft- ware command codes, Figure 13 for timing waveform and Figure 19 for a flowchart. Design Considerations SST recommends a high frequency 0.1 µF ceramic capac- itor to be placed as close as possible between VDD and VSS, e.g., less than 1 cm away from the VDD pin of the device. Additionally, a low frequency 4.7 µF electrolytic capacitor from VDD to VSS should be placed within 1 cm of the VDD pin. FIGURE 1: PIN ASSIGNMENTS FOR 40-LEAD TSOP (10MM X 14MM) - SSTLF041/043 I/O Buffers 349 ILL B1.6 Address Buffers DQ7 - DQ0 OE# BEF# WE# SuperFlash Memory SRAM Control Logic BES# AMS - A0 AMS = Most Significant Address Address Buffers & Latches FUNCTIONAL BLOCK DIAGRAM A16 A15 A14 A13 A12 A11 A9 A8 WE# NC BES# NC A18 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A17 VSS NC NC A10 DQ7 DQ6 DQ5 DQ4 VDD VDD NC DQ3 DQ2 DQ1 DQ0 OE# VSS BEF# A0 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 349 ILL F01.2 Standard Pinout Top View Die Up |
유사한 부품 번호 - SST31LF041 |
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유사한 설명 - SST31LF041 |
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