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SST31LF041 데이터시트(PDF) 1 Page - Silicon Storage Technology, Inc

부품명 SST31LF041
상세설명  4 Mbit Flash 1 Mbit or 256 Kbit SRAM ComboMemory
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제조업체  SST [Silicon Storage Technology, Inc]
홈페이지  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST31LF041 데이터시트(HTML) 1 Page - Silicon Storage Technology, Inc

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©2001 Silicon Storage Technology, Inc.
S71107-03-000
5/01
349
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
ComboMemory are trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
Data Sheet
FEATURES:
Monolithic Flash + SRAM ComboMemory
– SST31LF041/041A: 512K x8 Flash + 128K x8 SRAM
– SST31LF043/043A: 512K x8 Flash + 32K x8 SRAM
Single 3.0-3.6V Read and Write Operations
Concurrent Operation
– Read from or write to SRAM while
Erase/Program Flash
Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
Low Power Consumption:
– Active Current: 10 mA (typical) for Flash and
20 mA (typical) for SRAM Read
– Standby Current: 10 µA (typical)
Flash Sector-Erase Capability
– Uniform 4 KByte sectors
Latched Address and Data for Flash
Fast Read Access Times:
– SST31LF041/043
Flash: 70 ns
SRAM: 70 ns
– SST31LF041A/043A
Flash: 300 ns
SRAM: 300 ns
Flash Fast Erase and Byte-Program:
– Sector-Erase Time: 18 ms (typical)
– Bank-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Bank Rewrite Time: 8 seconds (typical)
Flash Automatic Erase and Program Timing
– Internal VPP Generation
Flash End-of-Write Detection
– Toggle Bit
– Data# Polling
CMOS I/O Compatibility
JEDEC Standard Command Set
Packages Available
– 32-lead TSOP (8 x 14 mm) SST31LF041A/043A
– 40-lead TSOP (10 x 14 mm) SST31LF041/043
PRODUCT DESCRIPTION
The SST31LF041/041A/043/043A devices are a 512K x8
CMOS flash memory bank combined with a 128K x8 or
32K x8 CMOS SRAM memory bank manufactured with
SST’s proprietary, high performance SuperFlash technol-
ogy. The SST31LF041/041A/043/043A devices write
(SRAM or flash) with a 3.0-3.6V power supply. The mono-
lithic SST31LF041/041A/043/043A devices conform to
Software
Data
Protect
(SDP)
commands
for
x8
EEPROMs.
Featuring high performance Byte-Program, the flash mem-
ory bank provides a maximum Byte-Program time of 20
µsec. The entire flash memory bank can be erased and
programmed byte-by-byte in typically 8 seconds, when
using interface features such as Toggle Bit or Data# Polling
to indicate the completion of Program operation. To protect
against inadvertent flash write, the SST31LF041/041A/
043/043A devices have on-chip hardware and Software
Data Protection schemes. Designed, manufactured, and
tested
for
a
wide
spectrum
of
applications,
the
SST31LF041/041A/043/043A devices are offered with a
guaranteed endurance of 10,000 cycles. Data retention is
rated at greater than 100 years.
The SST31LF041/041A/043/043A operate as two inde-
pendent memory banks with respective bank enable sig-
nals. The SRAM and Flash memory banks are
superimposed in the same memory address space. Both
memory banks share common address lines, data lines,
WE# and OE#. The memory bank selection is done by
memory bank enable signals. The SRAM bank enable sig-
nal, BES# selects the SRAM bank and the flash memory
bank enable signal, BEF# selects the flash memory bank.
The WE# signal has to be used with Software Data Protec-
tion (SDP) command sequence when controlling the Erase
and Program operations in the flash memory bank. The
SDP command sequence protects the data stored in the
flash memory bank from accidental alteration.
The SST31LF041/041A/043/043A provide the added func-
tionality of being able to simultaneously read from or write
to the SRAM bank while erasing or programming in the
flash memory bank. The SRAM memory bank can be read
or written while the flash memory bank performs Sector-
Erase, Bank-Erase, or Byte-Program concurrently. All flash
memory Erase and Program operations will automatically
latch the input address and data signals and complete the
operation in background without further input stimulus
requirement. Once the internally controlled Erase or Pro-
gram cycle in the flash bank has commenced, the SRAM
bank can be accessed for Read or Write.
The SST31LF041/041A/043/043A devices are suited for
applications that use both nonvolatile flash memory and
volatile SRAM memory to store code or data. For all sys-
tem
applications,
the
SST31LF041/041A/043/043A
4 Mbit Flash + 1 Mbit or 256 Kbit SRAM ComboMemory
SST31LF041 / SST31LF041A / SST31LF043 / SST31LF043A
SST31LF041 / 041A4Mb Flash (x8) + 1 Mb SRAM (x8) ComboMemories


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