Preliminary Specifications

Multi-Purpose Flash (MPF) + SRAM ComboMemory

SST32HF201 / SST32HF202 / SST32HF401 / SST32HF402

11

©2001 Silicon Storage Technology, Inc.

S71209-00-000

9/01

557

ADDRESSES AMSS-0

DQ15-0

UBS#, LBS#

Note: WE# remains High (VIH) for the Read cycle

AMSS = Most Significant SRAM Address

OE#

BES#

TRCS

TAAS

TBES

TOES

TBLZS

TOLZS

TBYES

TBYLZS

TBYHZS

DATA VALID

TOHZS

TBHZS

TOHS

557 ILL F02.0

TAWS

ADDRESSES AMSS-0

BES#

WE#

UBS#, LBS#

Notes: 1. If OE# is High during the Write cycle, the outputs will remain at high impedance.

2. If BES# goes Low coincident with or after WE# goes Low, the output will remain at high impedance.

If BES# goes High coincident with or before WE# goes High, the output will remain at high impedance.

Because DIN signals may be in the output state at this time, input signals of reverse polarity must not be applied.

TWPS

TWRS

TWCS

TASTS

TBWS

TBYWS

TODWS

TOEWS

TDSS

TDHS

557 ILL F03.1

NOTE 2

NOTE 2

DQ15-8, DQ7-0

VALID DATA IN