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SST39LF100-70-4I-WI 데이터시트(PDF) 7 Page - Silicon Storage Technology, Inc |
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SST39LF100-70-4I-WI 데이터시트(HTML) 7 Page - Silicon Storage Technology, Inc |
7 / 22 page Data Sheet 1 Mbit Multi-Purpose Flash SST39LF100 / SST39VF100 7 ©2001 Silicon Storage Technology, Inc. S71129-02-000 6/01 363 TABLE 5: DC OPERATING CHARACTERISTICS VDD = 3.0-3.6V FOR SST39LF100 AND 2.7-3.6V FOR SST39VF100 Symbol Parameter Limits Test Conditions Min Max Units IDD Power Supply Current Address input = VIL/VIH, at f=1/TRC Min., VDD=VDD Max. Read 30 mA CE#=OE#=VIL,WE#=VIH, all I/Os open Program and Erase 30 mA CE#=WE#=VIL, OE#=VIH ISB Standby VDD Current 20 µA CE#=VIHC, VDD = VDD Max. ILI Input Leakage Current 1 µA VIN =GND to VDD, VDD = VDD Max. ILO Output Leakage Current 10 µA VOUT =GND to VDD, VDD = VDD Max. VIL Input Low Voltage 0.8 VDD = VDD Min. VIH Input High Voltage 0.7VDD VVDD = VDD Max. VIHC Input High Voltage (CMOS) VDD-0.3 V VDD = VDD Max. VOL Output Low Voltage 0.2 V IOL = 5.8 mA, VDD = VDD Min. VOH Output High Voltage VDD-0.2 V IOH = -100 µA, VDD = VDD Min. T5.5 363 TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS Symbol Parameter Minimum Units TPU-READ1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Power-up to Read Operation 100 µs TPU-WRITE1 Power-up to Program/Erase Operation 100 µs T6.0 363 TABLE 7: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open) Parameter Description Test Condition Maximum CI/O1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. I/O Pin Capacitance VI/O = 0V 12 pF CIN1 Input Capacitance VIN = 0V 6 pF T7.0 363 TABLE 8: RELIABILITY CHARACTERISTICS Symbol Parameter Minimum Specification Units Test Method NEND1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Endurance 10,000 Cycles JEDEC Standard A117 TDR1 Data Retention 100 Years JEDEC Standard A103 ILTH1 Latch Up 100 + IDD mA JEDEC Standard 78 T8.1 363 |
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