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SST29VF512-55-4I-PH 데이터시트(PDF) 9 Page - Silicon Storage Technology, Inc |
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SST29VF512-55-4I-PH 데이터시트(HTML) 9 Page - Silicon Storage Technology, Inc |
9 / 24 page Preliminary Specifications 512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Small-Sector Flash SST29SF512 / SST29SF010 / SST29SF020 / SST29SF040 SST29VF512 / SST29VF010 / SST29VF020 / SST29VF040 9 ©2001 Silicon Storage Technology, Inc. S71160-05-000 5/01 505 TABLE 6: DC OPERATING CHARACTERISTICS VDD = 2.7-3.6V FOR SST29VFXXX Symbol Parameter Limits Test Conditions Min Max Units IDD Power Supply Current Address input=VIL/VIH, at f=1/TRC Min VDD=VDD Max Read 20 mA CE#=OE#=VIL, WE#=VIH, all I/Os open Write 20 mA CE#=WE#=VIL, OE#=VIH ISB Standby VDD Current 15 µA CE#=VIHC, VDD=VDD Max ILI Input Leakage Current 1 µA VIN=GND to VDD, VDD=VDD Max ILO Output Leakage Current 10 µA VOUT=GND to VDD, VDD=VDD Max VIL Input Low Voltage 0.8 V VDD=VDD Min VIH Input High Voltage 0.7VDD VVDD=VDD Max VIHC Input High Voltage (CMOS) VDD-0.3 V VDD=VDD Max VOL Output Low Voltage 0.2 V IOL=100 µA, VDD=VDD Min VOH Output High Voltage VDD-0.2 V IOH=-100 µA, VDD=VDD Min T6.5 505 TABLE 7: RECOMMENDED SYSTEM POWER-UP TIMINGS Symbol Parameter Minimum Units TPU-READ1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Power-up to Read Operation 100 µs TPU-WRITE1 Power-up to Program/Erase Operation 100 µs T7.1 505 TABLE 8: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open) Parameter Description Test Condition Maximum CI/O1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. I/O Pin Capacitance VI/O = 0V 12 pF CIN1 Input Capacitance VIN = 0V 6 pF T8.1 505 TABLE 9: RELIABILITY CHARACTERISTICS Symbol Parameter Minimum Specification Units Test Method NEND1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. Endurance 10,000 Cycles JEDEC Standard A117 TDR1 Data Retention 100 Years JEDEC Standard A103 ILTH1 Latch Up 100 + IDD mA JEDEC Standard 78 T9.2 505 |
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