74LVC2G17GV-Q100 datasheet(5/16 Pages) NXP

부품명	74LVC2G17GV-Q100

상세설명	Dual non-inverting Schmitt trigger with 5 V tolerant input

Download	16 Pages

Scroll/Zoom	100%

제조업체	NXP [NXP Semiconductors]

홈페이지	http://www.nxp.com

Logo

5 / 16 page

74LVC2G17_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 7 August 2012

5 of 16

NXP Semiconductors

74LVC2G17-Q100

Dual non-inverting Schmitt trigger with 5 V tolerant input

11. Static characteristics

Table 7.

Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ

Max

Unit

Tamb = 40 Cto+85 C[1]

VOL

LOW-level output voltage

VI = VT+ or VT

IO =100 A; VCC = 1.65 V to 5.5 V

-

0.1

V

IO =4mA; VCC = 1.65 V

-

0.45

V

IO =8mA; VCC = 2.3 V

-

0.3

V

IO =12mA; VCC = 2.7 V

-

0.4

V

IO =24mA; VCC = 3.0 V

-

0.55

V

IO =32mA; VCC = 4.5 V

-

0.55

V

VOH

HIGH-level output voltage

VI = VT+ or VT

IO = 100 A; VCC = 1.65 V to 5.5 V

VCC  0.1 -

-

V

IO = 4mA; VCC = 1.65 V

1.2

-

V

IO = 8mA; VCC = 2.3 V

1.9

-

V

IO = 12 mA; VCC = 2.7 V

2.2

-

V

IO = 24 mA; VCC = 3.0 V

2.3

-

V

IO = 32 mA; VCC = 4.5 V

3.8

-

V

II

input leakage current

VI = 5.5 V or GND; VCC = 5.5 V

-

0.1

5

A

IOFF

power-off leakage current

VI or VO = 5.5 V; VCC = 0 V

-

0.1

10

A

ICC

supply current

VI =VCC or GND; IO =0A;

VCC =5.5 V

-0.1

10

A

I

CC

additional supply current

VI =VCC  0.6 V; IO =0A;

VCC = 2.3 V to 5.5 V

-5

500

A

CI

input capacitance

-

3.5

-

pF

Tamb = 40 C to +125 C

VOL

LOW-level output voltage

VI = VT+ or VT

IO =100 A; VCC = 1.65 V to 5.5 V

-

0.1

V

IO =4mA; VCC = 1.65 V

-

0.70

V

IO =8mA; VCC = 2.3 V

-

0.45

V

IO =12mA; VCC = 2.7 V

-

0.60

V

IO =24mA; VCC = 3.0 V

-

0.80

V

IO =32mA; VCC = 4.5 V

-

0.80

V

VOH

HIGH-level output voltage

VI = VT+ or VT

IO = 100 A; VCC = 1.65 V to 5.5 V

VCC  0.1 -

-

V

IO = 4mA; VCC = 1.65 V

0.95

-

V

IO = 8mA; VCC = 2.3 V

1.7

-

V

IO = 12 mA; VCC = 2.7 V

1.9

-

V

IO = 24 mA; VCC = 3.0 V

2.0

-

V

IO = 32 mA; VCC = 4.5 V

3.4

-

V

II

input leakage current

VI = 5.5 V or GND; VCC = 5.5 V

-

0.1

20

A

유사한 부품 번호 - 74LVC2G17GV-Q100

제조업체	부품명	데이터시트	상세설명
Nexperia B.V. All right...	74LVC2G17GV-Q100	225Kb / 13P	Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 5 - 24 January 2022

More results

유사한 설명 - 74LVC2G17GV-Q100

제조업체	부품명	데이터시트	상세설명
NXP Semiconductors	74LVC2G17GW-G	205Kb / 19P	Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 8-2 May 2013
Nexperia B.V. All right...	74LVC2G17	258Kb / 17P	Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 11 - 24 January 2022
Nexperia B.V. All right...	74LVC2G17-Q100	225Kb / 13P	Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 5 - 24 January 2022
NXP Semiconductors	74LVC2G17	98Kb / 16P	Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 04-9 October 2006
Integrated Circuit Syst...	74LVC2G17	84Kb / 16P	Dual non-inverting Schmitt-trigger with 5 V tolerant input
NXP Semiconductors	74LVC2G17	96Kb / 17P	Dual non-inverting Schmitt-trigger with 5 V tolerant input 2004 Sep 08
	74LVC2G14	97Kb / 17P	Dual inverting Schmitt-trigger with 5 V tolerant input 2004 Sep 08
	74LVC2G14	93Kb / 17P	Dual inverting Schmitt trigger with 5 V tolerant input Rev. 04-4 September 2007
Nexperia B.V. All right...	74LVC2G14-Q100	238Kb / 16P	Dual inverting Schmitt trigger with 5 V tolerant input
Nexperia B.V. All right...	74LVC2G14	266Kb / 17P	Dual inverting Schmitt trigger with 5 V tolerant input Rev. 13 - 24 January 2022

More results

74LVC2G17GV-Q100 데이터시트(PDF) 5 Page - NXP Semiconductors

74LVC2G17GV-Q100 데이터시트(HTML) 5 Page - NXP Semiconductors

유사한 부품 번호 - 74LVC2G17GV-Q100

유사한 설명 - 74LVC2G17GV-Q100

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

데이터시트 다운로드

링크 URL