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SN74ALS29846 데이터시트(PDF) 1 Page - Texas Instruments |
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SN74ALS29846 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 7 page SN74ALS29845, SN74ALS29846 8BIT BUS INTERFACE DTYPE LATCHES WITH 3STATE OUTPUTS SDAS150 − D3118 — JUNE 1988 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright 1988, Texas Instruments Incorporated 1 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • 3-State Buffer-Type Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Provides Extra Bus Driving Latches Necessary For Wider Address/Data Paths or Buses With Parity • Buffered Control Inputs to Reduce DC Loading • Power-Up High-Impedance State • Package Options Include Plastic “Small Outline” Packages, Plastic Chip Carriers, and Standard Plastic 300-mil DIPs • Dependable Texas Instruments Quality and Reliability description These 8-bit latches feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are transparent D-type. The ′ALS29845 has noninverting data (D) inputs. The ′ALS29846 has inverting D inputs. Since CLR and PRE are independent of the clock, taking the CLR input low will cause the eight Q outputs to go low. Taking the PRE input low will cause the eight Q outputs to go high. When both PRE and CLR are taken low, the outputs will follow the preset condition. The buffered output control inputs (OC1, OC2, and OC3) can be used to place the eight outputs in either a normal logic state (high or low levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered-down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need SN74ALS29845 ...DW or NT Package (Top View) SN74ALS29846 . . . FN Package (Top View) SN74ALS29846 . . . DW or NT Package (Top View) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OC1 OC2 1D 2D 3D 4D 5D 6D 7D 8D CLR GND VCC OC3 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q PRE C 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OC1 OC2 1D 2D 3D 4D 5D 6D 7D 8D CLR GND VCC OC3 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q PRE C SN74ALS29845 ...FN Package (Top View) 32 1 28 27 12 5 6 7 8 9 10 11 25 24 23 22 21 20 19 2Q 3Q 4Q NC 5Q 6Q 7Q 2D 3D 4D NC 5D 6D 7D 426 13 14 15 16 17 18 32 1 28 27 12 5 6 7 8 9 10 11 25 24 23 22 21 20 19 2Q 3Q 4Q NC 5Q 6Q 7Q 426 13 14 15 16 17 18 NC — No internal connection 2D 3D 4D NC 5D 6D 7D |
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