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SN74F382N 데이터시트(PDF) 2 Page - Texas Instruments |
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SN74F382N 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 8 page SN74F382 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR SDFS079A − D2932, MARCH 1987 − REVISED OCTOBER 1993 2−2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PIN DESIGNATIONS DESIGNATION PIN NO. FUNCTION A3, A2, A1, A0 17, 19, 1, 3 Word A inputs B3, B2, B1, B0 16, 18, 2, 4 Word B inputs S2, S1, S0 7, 6, 5 Function-select inputs Cn 15 Carry input for addition, inverted carry input for subtraction F3, F2, F1, F0 12, 11, 9, 8 Function outputs Cn+4 14 Ripple-carry output OVR 13 Overflow output VCC 20 Supply voltage GND 10 Ground logic symbol† ALU P 3 A0 Q 4 B0 F3 12 14 (1,2) BO 3CO M 0 7 F0 8 0 5 S0 6 S1 2 7 S2 3 C1 [1] 15 P 1 A1 Q 2 B1 F1 9 P 19 A2 Q 18 B2 F2 11 P 17 A3 Q 16 B3 Cn (1/2) B1 [1] OVR 13 Cn+4 BO/CO BO/CO 1 2 4 8 =1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. function table Certain differences exist in the OVR and Cn+4 function table compared with similar parts from other technologies and other vendors. No differences exist in the arithmetic modes (B minus A, A minus B, and A plus B) where these outputs perform valuable cascade functions. There are slight differences in the other modes (clear, A + B, A ⊕ B, AB, and preset), in which these outputs strictly don’t care. The following function table is a condensed version and assumes for An that A0, A1, A2, and A3 inputs all agree, and for Bn that B0, B1, B2, and B3 inputs all agree. This table is intended to point out the response of these OVR and Cn+4 outputs in all modes of operation to facilitate incoming inspection. |
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