SN54ABT32318, SN74ABT32318

18BIT TRIPORT UNIVERSAL BUS EXCHANGERS

SCBS180A − JUNE 1992 − REVISED JULY 1994

5−2

POST OFFICE BOX 655303

POST OFFICE BOX 1443

description

The

′ABT32318 consists of three 18-bit registered input/output (I/O) ports. These registers combine D-type

latches and flip-flops to allow data flow in transparent, latch, and clock modes. Data from one input port can be

exchanged to one or more of the other ports. Because of the universal storage element, multiple combinations

of real-time and stored data can be exchanged among the three ports.

Data flow in each direction is controlled by the output-enable (OEA, OEB, and OEC), select-control (SELA,

SELB, and SELC), latch-enable (LEA, LEB, and LEC), and clock (CLKA, CLKB, and CLKC) inputs. The A data

register operates in the transparent mode when LEA is high. When LEA is low, data is latched if CLKA is held

at a high or low logic level. If LEA is low, data is stored on the low-to-high transition of CLKA. Output data

selection is accomplished by the select-control pins. All three ports have active-low output enables, so when

the output-enable input is low, the outputs are active; when the output-enable input is high, the outputs are in

the high-impedance state.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN54ABT32318 is characterized for operation over the full military temperature range of − 55

°C to 125°C.

The SN74ABT32318 is characterized for operation from − 40

°C to 85°C.