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AD1865R-J 데이터시트(PDF) 3 Page - Analog Devices

부품명 AD1865R-J
상세설명  Complete Dual 18-Bit 16 x Fs Audio DAC
Download  12 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

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AD1865
REV. 0
–3–
ABSOLUTE MAXIMUM RATINGS*
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.0 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6.0 V
–VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –6.0 V to 0 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 to VL
Short Circuit Protection . . . . . . . . Indefinite Short to Ground
Soldering (10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300
°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1865 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Temperature
Package
Model
Range
THD+N @ FS
Option*
AD1865N
–25
°C to +70°C
0.006%
N-24A
AD1865N-J
–25
°C to +70°C
0.004%
N-24A
AD1865R
–25
°C to +70°C
0.006%
R-28
AD1865R-J
–25
°C to +70°C
0.004%
R-28
*N = Plastic DIP, R = Small Outline IC Package.
PIN DESIGNATIONS
DIP SOIC
1122
–VS
Negative Analog Supply
12
23
TRIM
Right Channel Trim Network Connection
13
24
MSB
Right Channel Trim Potentiometer
Wiper Connection
1426
IOUT
Right Channel Output Current
15
28
AGND Analog Common Pin
16
11
SJ
Right Channel Amplifier Summing Junction
17
12RF
Right Channel Feedback Resistor
18
13VOUT
Right Channel Output Voltage
19
14+VL
Positive Digital Supply
10
15
DR
Right Channel Data Input Pin
11
16
LR
Right Channel Latch Pin
12
17
CLK
Clock Input Pin
13
18
DGND Digital Common Pin
14
19
LL
Left Channel Latch Pin
15
10
DL
Left Channel Data Input Pin
16
11, 16, 18 NC
No Internal Connection*
25, 27
17
12
VOUT
Left Channel Output Voltage
18
13
RF
Left Channel Feedback Resistor
19
14
SJ
Left Channel Amplifier Summing Junction
20
15
AGND Analog Common Pin
21
17
IOUT
Left Channel Output Current
22
19
MSB
Left Channel Trim Potentiometer
Wiper Connection
23
20
TRIM
Left Channel Trim Network Connection
24
21
+VS
Positive Analog Supply
*Pin 16 has no internal connection; –VL from AD1864 DIP socket can be safely
applied.
PINOUT
(24-Pin DIP Package)
14
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
13
TOP VIEW
(Not to Scale)
AD1865
+VS
NC
TRIM
MSB
SJ
DL
LL
DGND
AGND
VOUT
IOUT
RF
–VS
IOUT
+VL
VOUT
TRIM
MSB
LR
CLK
DR
AGND
SJ
RF
LEFT
CHANNEL
RIGHT
CHANNEL
NC = NO CONNECT
(28-Pin SOIC Package)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TOP VIEW
(Not to Scale)
AD1865
SJ
R
F
V
OUT
+V
L
DR
LR
CLK
DL
LL
DGND
NC
V
OUT
R
F
SJ
AGND
NC
I
OUT
NC
MSB
TRIM
–V
S
+V
S
TRIM
MSB
NC
I
OUT
NC
AGND
NC = NO CONNECT


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