ACE24C1024

Two-wire Serial EEPROM

VER 1.4

9

Write Operations

Byte Write:

A write operation requires two 8-bit data word address following the device address word and

acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then

clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a

zero and the addressing device, such as a microcontroller, must terminate the write sequence with a

memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write

is complete (refer to Figure 8).

Page Write:

The 1024K EEPROM is capable of an 256-byte page write.

A page write is initiated the same as a byte write, but the microcontroller does not send a stop

condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the

first data word, the microcontroller can transmit up to 255 more data words. The EEPROM will respond

with a zero after each data word received. The microcontroller must terminate the page write sequence

with a stop condition (refer to Figure 9).

The data word address lower 8 bits are internally incremented following the receipt of each data word.

The higher data word address bits are not incremented, retaining the memory page row location. When

the word address, internally generated, reaches the page boundary, the following byte is placed at the

beginning of the same page. If more than 256 data words are transmitted to the EEPROM, the data

word address will “roll over” and previous data will be overwritten.

Acknowledge Polling:

Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge

polling can be initiated. This involves sending a start condition followed by the device address word.

The read/write bit is representative of the operation desired. Only if the internal write cycle has

completed will the EEPROM respond with a zero allowing the read or write sequence to continue.

Read Operations

Read operations are initiated the same way as write operations with the exception that the read/write

select bit in the device address word is set to one. There are three read operations: current address

read, random address read and sequential read.

Current Address Read:

The internal data word address counter maintains the last address accessed during the last read or

write operation, incremented by one. This address stays valid between operations as long as the chip

power is maintained. The address “roll over” during read is from the last byte of the last memory page

to the

first byte of the first page. The address “roll over” during write is from the last byte of the current

page to the first byte of the same page.

Once the device address with the read/write select bit set to one is clocked in and acknowledged by

the EEPROM, the current address data word is serially clocked out. The microcontroller does not

respond with an input zero but does generate a following stop condition (refer to Figure 10).