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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS1630-FSZR 데이터시트(PDF) 4 Page - Cirrus Logic |
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CS1630-FSZR 데이터시트(HTML) 4 Page - Cirrus Logic |
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4 / 56 page  CS1630/31 4 DS954F2 1. INTRODUCTION Figure 1. CS1630/31 Block Diagram A typical schematic using the CS1630/31 IC is shown on the front page. Startup current is provided from a patent-pending, external high-voltage source-follower network. In addition to providing startup current, this unique topology is integral in providing compatibility with digital dimmers by ensuring VDD power is always available to the IC. During steady-state operation, an auxiliary winding on the boost inductor back-biases the source-follower circuit and provides steady-state operating current to the IC to improve system efficiency. The rectified input voltage is sensed as a current into pin IAC and is used to control the adaptive dimmer compatibility algorithm and extract the phase of the input voltage for output dimming control. During steady-state operation, the external high-voltage, source-follower circuit is source-switched in critical conduction mode (CRM) to boost the input voltage. This allows the boost stage to maintain good power factor, provide dimmer compatibility, reduce bulk capacitor ripple current, and provide a regulated input voltage to the second stage. The current into the boost output voltage sense pin (BSTOUT) senses the output voltage of the CRM boost front-end. The quasi-resonant second stage is implemented with peak- current mode primary-side control, which eliminates the need for additional components to provide feedback from the secondary and reduces system cost and complexity. Voltage across an external user-selected resistor is sensed through pin FBSENSE to control the peak current through the second stage inductor. Leading-edge and trailing-edge blanking on pin FBSENSE prevents false triggering. Pin FBAUX is used to sense the second stage inductor demagnetization to ensure quasi-resonant switching of the output stage. An internal current source is adjusted by a feedback loop to regulate a constant reference voltage on pin eOTP for external negative temperature coefficient (NTC) thermistor measurements. An external NTC is connected to pin eOTP to provide thermal protection of the system and LED temperature compensation. The output current of the system is steadily reduced when the system temperature exceeds a programmable temperature set point. If the temperature reaches a designated high set point, the IC is shutdown and stops switching. VZ POR + - Voltage Regulator 14 VDD 11 FBSENSE + - 15 FBAUX + - 13 GD 2 IAC DAC + - Peak Control Flyback ZCD + - Output Open 12 GND OLP + - 16 BSTOUT OCP + - 1 BSTAUX Boost ZCD 3 CLAMP VST(th ) VSTP(th ) VOCP(th ) V FB ZCD(th) VOVP(th ) VOLP(th) VFBZCD(th) VPk_Max(th) 10 4 SGND 5 SOURCE + - + - VDD ICONNECT VCONNECT(th) VSOURCE(th ) 7 SCL 6 SDA 8 NC 9 SYNC eOTP 15k ADC MUX 15k VDD Iref tFBZCD I CLA MP tBSTZCD ISOURCE Blank 3 |
유사한 부품 번호 - CS1630-FSZR |
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유사한 설명 - CS1630-FSZR |
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