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AD7777AN 데이터시트(PDF) 5 Page - Analog Devices |
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AD7777AN 데이터시트(HTML) 5 Page - Analog Devices |
5 / 12 page AD7776/AD7777/AD7778 –5– REV. 0 PIN FUNCTION DESCRIPTION Mnemonic Description VCC +5 V Power Supply. AGND Analog Ground. DGND Digital Ground. Ground reference for digital circuitry. DB0–DB9 Input/Output Data Bus. This is a bidirectional data port from which ADC output data may be read and to which control register data may be written. BUSY/INT Busy/Interrupt Output. Active low logic output indicating A/D converter status. This logic output has two modes of operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set low, then the BUSY/INT output will behave as a BUSY signal. The BUSY signal will go low and stay low for the duration of a single conversion, or if simultaneous sampling has been selected, BUSY will stay low for the duration of both conversions. If CR9 is set high, then the BUSY/INT output behaves as an INTERRUPT signal. The INT signal will go low and remain low after either a single conversion is completed or after a double conversion is completed if simulta- neous sampling has been selected. With CR9 high, the falling edge of WR or RD resets the INT line high. CS Chip Select Input. The device is selected when this input is low. WR Write Input (Active Low). It is used in conjunction with CS to write data to the control register. Data is latched to the registers on the rising edge of WR. Following the rising edge of WR, the analog input is acquired and a conversion is started. RD Read Input (Active Low). It is used in conjunction with CS to enable the data outputs from the ADC registers. AIN1–8 Analog Inputs 1–8. The analog input range is VBIAS ± VSWING where VBIAS and VSWING are defined by the reference voltage applied to REFIN. Input resistance between any of the analog input pins and AGND is 10 k Ω or greater. REFIN Voltage Reference Input. The AD7776/AD7777/AD7778 are specified over a voltage reference range of 1.9 V to 2.1 V with a nominal value of 2.0 V. This REFIN voltage provides the VBIAS and VSWING levels for the input channel(s). VBIAS is equal to REFIN and VSWING is nominally equal to REFIN/2. Input resistance between this REFIN pin and AGND is 10 k Ω or greater. REFOUT Voltage Reference Output. The internal voltage reference, which is nominally 2.0 V and can be used to provide the bias voltage (VBIAS) for the input channel(s), is provided at this pin. CREFIN Reference Decoupling Capacitor. A 10 nF capacitor must be connected from this pin to AGND to ensure correct operation of the high speed ADC. RTN Signal Return Path for the input channel(s). Normally RTN is connected to AGND at the package. CIRCUIT DESCRIPTION ADC Transfer Function For all versions, an input signal of the form VBIAS ± V SWING is expected. This VBIAS signal level operates as a pseudo ground to which all input signals must be referred. The VBIAS level is de- termined by the voltage applied to the REFIN pin. This can be driven by an external voltage source or, alternatively, the on- board 2 V reference, available at REFOUT, can be used. The magnitude of the input signal swing is equal to VBIAS/2 (or REFIN/2) and is set internally. With a REFIN of 2 V, the analog input signal level varies from 1 V up to 3 V i.e., 2 ± 1 V. Fig- ure 5 shows the transfer function of the ADC and its relation- ship to VBIAS and VSWING. The half-scale twos complement code of the ADC, 000 Hex (00 0000 0000 Binary), occurs at an input voltage equal to VBIAS. The input full-scale range of the ADC is equal to 2 VSWING, so that the Plus Full-Scale transition (1FE to 1FF) occurs at a voltage equal to VBIAS + VSWING – 1.5 LSBs and the minus full-scale code transition (200 to 201) occurs at a voltage VBIAS – VSWING + 0.5 LSBs. ADC OUTPUT CODE (HEX) 1FF 1FE 202 201 200 000 VBIAS–VSWING VBIAS VBIAS+VSWING ANALOG INPUT, VIN Figure 5. ADC Transfer Function |
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