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OP282GS 데이터시트(PDF) 2 Page - Analog Devices |
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OP282GS 데이터시트(HTML) 2 Page - Analog Devices |
2 / 12 page –2– OP282/OP482–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V S = 15.0 V, TA = +25 C unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units INPUT CHARACTERISTICS Offset Voltage VOS OP282 0.2 3 mV OP282, –40 ≤ T A ≤ +85°C 4.5 mV Offset Voltage VOS OP482 0.2 4 mV OP482, –40 ≤ T A ≤ +85°C6 mV Input Bias Current IB VCM = 0 V 3 100 pA VCM = 0 V, Note 1 500 pA Input Offset Current IOS VCM = 0 V 1 50 pA VCM = 0 V, Note 1 250 pA Input Voltage Range –11 +15 V Common-Mode Rejection CMR –11 V ≤ V CM ≤ +15 V, –40 ≤ TA ≤ +85°C70 90 dB Large Signal Voltage Gain AVO RL = 10 k Ω 20 V/mV RL = 10 kΩ, –40 ≤ TA ≤ +85°C 15 V/mV Offset Voltage Drift ∆V OS/ ∆T10 µV/°C Bias Current Drift ∆I B/∆T 8 pA/ °C OUTPUT CHARACTERISTICS Output Voltage Swing VO RL = 10 kΩ –13.5 ±13.9 13.5 V Short Circuit Limit ISC Source 3 10 mA Sink –8 –12 mA Open-Loop Output Impedance ZOUT f = 1 MHz 200 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ± 4.5 V to ± 18 V, –40 ≤ T A ≤ +85°C 25 316 µV/V Supply Current/Amplifier ISY VO = 0 V, 40 ≤ TA ≤ +85°C 210 250 µA Supply Voltage Range VS ±4.5 ±18 V DYNAMIC PERFORMANCE Slew Rate SR RL = 10 kΩ 79 V/ µs Full-Power Bandwidth BWP 1% Distortion 125 kHz Settling Time tS To 0.01% 1.6 µs Gain Bandwidth Product GBP 4 MHz Phase Margin ØO 55 Degrees NOISE PERFORMANCE Voltage Noise en p-p 0.1 Hz to 10 Hz 1.3 µV p-p Voltage Noise Density en f = 1 kHz 36 nV/ √Hz Current Noise Density in 0.01 pA/ √Hz NOTE 1The input bias and offset currents are tested at T A = TJ = +85°C. Bias and offset currents are guaranteed but not tested at –40 °C. Specifications subject to change without notice. WAFER TEST LIMITS (@ V S = 15.0 V, TA = +25 C unless otherwise noted) Parameter Symbol Conditions Limit Units Offset Voltage VOS OP282 3 mV max Offset Voltage VOS OP482 4 mV max Input Bias Current IB VCM = 0 V 100 pA max Input Offset Current IOS VCM = 0 V 50 pA max Input Voltage Range 1 –11, +15 V min/max Common-Mode Rejection CMRR –11 V ≤ V CM ≤ +15 V 70 dB min Power Supply Rejection Ratio PSRR V = ±4.5 V to ±18 V 316 µV/V Large Signal Voltage Gain AVO RL = 10 kΩ 20 V/mV min Output Voltage Range VO RL = 10 k Ω±13.5 V min Supply Current/Amplifier ISY VO = 0 V, RL = ∞ 250 µA max NOTES Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 1Guaranteed by CMR test. Specifications subject to change without notice. REV. B |
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