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SSM2402P 데이터시트(PDF) 2 Page - Analog Devices |
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2 / 12 page REV. A –2– SSM2402/SSM2412–SPECIFICATIONS ELECTRICAL CHARACTERISTICS SSM2402/SSM2412 Parameter Symbol Conditions Min Typ Max Units POSITIVE SUPPLY CURRENT +ISY VIL = 0.8 V, 2.0 V 1 6.0 7.5 mA NEGATIVE SUPPLY CURRENT –ISY VIL = 0.8 V, 2.0 V 1 4.8 6.0 mA GROUND CURRENT IGND VIL = 0.8 V, 2.0 V 1 0.6 1.5 mA DIGITAL INPUT HIGH VINH TA = Full Temperature Range 20 V DIGITAL INPUT LOW VINL TA = Full Temperature Range 0.8 V LOGIC INPUT CURRENT ILOGIC VIN = 0 V to 15 V 2 1.0 5.0 µA ANALOG VOLTAGE RANGE 3 VANALOG –14.2 +14.2 V ANALOG CURRENT RANGE 3 IANALOG –10 +10 mA OVERVOLTAGE INPUT CURRENT VIN = ±V SUPPLY ±40 mA SWITCH ON RESISTANCE RON –14.2 V ≤ V A ≤ +14.2 V IA = ± 10 mA, VIL = 2.0 V TA = +25°C60 85 Ω TA = Full Temperature Range 115 Ω Tempco ( ∆R ON/∆T) 0.2 Ω/°C RON MATCH RON MATCH –14.2 V ≤ V A ≤ +14.2 V 1 5 % IA = ± 10 mA, VIL = 2.0 V SWITCH ON LEAKAGE CURRENT IS(ON) VIL = 2.0 V –14.2 V ≤ V A ≤ +14.2 V 0.05 1.0 µA VA = 0 V 0.05 10.0 nA SWITCH OFF LEAKAGE CURRENT IS(OFF) VIL = 0.8 V –14.2 V ≤ V A ≤ +14.2 V 0.05 1.0 µA VA = 0 V 0.05 10.0 nA TURN-ON TIME 4 tON VA = +10 V, RL = 2 kΩ SSM2402 10.0 ms TA = +25°C, See Test Circuit SSM2412 3.5 TURN-OFF TIME 5 tOFF VA = +10 V, RL = 2 kΩ SSM2402 4.0 ms TA = +25°C, See Test Circuit SSM2412 1.5 BREAK-BEFORE-MAKE tOFF–tON TA = +25°C SSM2402 6.0 ms TIME DELAY 6 SSM2412 2.0 CHARGE INJECTION Q TA = +25°C SSM2402 50 pC SSM2412 150 ON-STATE INPUT CS(ON) VA = 1 V rms 12 pF CAPACITANCE f = 5 kHz, TA = +25°C OFF-STATE INPUT CS(OFF) VA = 1 V rms 4 pF CAPACITANCE f = 5 kHz, TA = +25°C OFF ISOLATION ISO(OFF) VA = 10 V rms, 20 Hz to 20 kHz 120 dB TA = +25°C, See Test Circuit CHANNEL-TO-CHANNEL CT VA = 10 V rms, 20 Hz to 20 kHz 96 dB CROSSTALK TA = +25°C TOTAL HARMONIC THD 0 V to 10 V rms, 20 Hz to 20 kHz 0.003 0.01 % DISTORTION 7 TA = +25°C, RL = 5 kΩ SPECTRAL NOISE DENSITY en 20 Hz to 20 kHz, TA = +25°C 1 nV/ √Hz WIDEBAND NOISE DENSITY en p-p 20 Hz to 20 kHz, TA = +25°C 0.2 µV p-p NOTES 1“V IL” is the Logic Control Input. 2Current tested at V IN = 0 V. This is the worst case condition. 3Guaranteed by R ON test condition. 4Turn-ON time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the final value. 5Turn-OFF time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the initial value. 6Switch is guaranteed by design to provide break-before-make operation. 7THD guaranteed by design and dynamic R ON testing. Specifications subject to change without notice. (@ VS = 18 V, RL = OPEN, and –40 C ≤ T A ≤ +85 C unless otherwise noted. All specifications, tables, graphs, and application data apply to both the SSM2402 and SSM2412, unless otherwise noted.) |
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