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Functional Description

The AC/ACT821 consists of ten D-type edge-triggered flip-

flops. The buffered Clock (CP) and buffered Output Enable

(OE) are common to all flip-flops. The flip-flops will store

the state of their individual D inputs that meet the setup and

hold time requirements on the LOW-to-HIGH CP transition.

With OE LOW the contents of the flip-flops are available at

the outputs. When OE is HIGH the outputs go to the high

impedance state. Operation of the OE input does not affect

the state of the flip-flops.

Function Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

Z

= HIGH Impedance

 = LOW-to-HIGH Clock Transition

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Inputs

Internal

Outputs

Function

OE

CP

D

Q

O

H



L

L

Z

High Z

H



H

H

Z

High Z

L



LL

L

Load

L



HH

H

Load