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74LCX02MTCX_NLX 데이터시트(PDF) 1 Page - Fairchild Semiconductor |
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74LCX02MTCX_NLX 데이터시트(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2005 Fairchild Semiconductor Corporation ds012409 www.fairchildsemi.com March 1995 Revised January 2005 74LCX02 Low Voltage Quad 2-Input NOR Gate with 5V Tolerant Inputs General Description The LCX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys- tems to 3V systems. The 74LCX02 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. Features s 5V tolerant inputs s 2.3V–3.6V VCC specification provided s 5.2 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s ±24 mA output drive (V CC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” package available in Tape and Reel only. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Order Number Package Package Description Number 74LCX02M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX02SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX02MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX02MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description An, Bn Inputs On Outputs |
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