전자부품 데이터시트 검색엔진 |
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74LCXZ16240MEA 데이터시트(PDF) 2 Page - Fairchild Semiconductor |
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74LCXZ16240MEA 데이터시트(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page Preliminary www.fairchildsemi.com 2 Truth Tables H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Functional Description The LCXZ16240 contains sixteen inverting buffers with 3- STATE standard outputs. The device is nibble (4 bits) con- trolled with each nibble functioning identically, but indepen- dent of the other. The control pins may be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Logic Diagram Inputs Outputs OE1 I0–I3 O0–O3 LL H LH L HX Z Inputs Outputs OE3 I8–I11 O8–O11 LL H LH L HX Z Inputs Outputs OE2 I4–I7 O4–O7 LL H LH L HX Z Inputs Outputs OE4 I12–I15 O12–O15 LL H LH L HX Z |
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