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DM74LS175N 데이터시트(PDF) 2 Page - Fairchild Semiconductor |
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DM74LS175N 데이터시트(HTML) 2 Page - Fairchild Semiconductor |
2 / 7 page www.fairchildsemi.com 2 Function Table (Each Flip-Flop) H = HIGH Level (steady state) L = LOW Level (steady state) X = Don’t Care ↑ = Transition from LOW-to-HIGH level Q0 = The level of Q before the indicated steady-state input conditions were established. † = DM74LS175 only Logic Diagrams DM74LS174 DM74LS175 Inputs Outputs Clear Clock D Q Q † LX X L H H ↑ HH L H ↑ LL H HL X Q0 Q0 |
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