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FDS6685 데이터시트(PDF) 4 Page - Fairchild Semiconductor |
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FDS6685 데이터시트(HTML) 4 Page - Fairchild Semiconductor |
4 / 8 page FDS6685 Rev. B Typical Characteristics (continued) Figure 7. Gate-Charge Characteristics Figure 8. Capacitance Characteristics Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (s e c ) 1 S i n g l e P u l s e D = 0.5 0.1 0.05 0.02 0.0 1 0.2 D u t y C y c l e, D = t /t 1 2 R (t) = r(t) * R R = 125°C/W θJA θJA θJA T - T = P * R (t) θJA A J P(pk ) t1 t 2 0 500 1000 1500 2000 2500 0 5 10 15 20 25 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) CISS COSS CRSS f = 1 MHz VGS = 0 V 0 2 4 6 8 10 0 5 10 15 20 25 30 35 Qg, GATE CHARGE (nC) ID = -8.8A VDS = -5V -10V -15V 0.01 0.1 1 10 100 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) DC 10s 1s 100ms 10ms 1ms 100 µs RDS(ON) LIMIT VGS = -10V SINGLE PULSE RθJA = 125 oC/W TA = 25 oC 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 SINGLE PULSE TIME (SEC) SINGLE PULSE RθJA = 125 o C/W TA = 25 o C |
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