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AD5331BRU-REEL7 데이터시트(PDF) 11 Page - Analog Devices

부품명 AD5331BRU-REEL7
상세설명  2.5 V to 5.5 V, 115 關A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
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AD5331BRU-REEL7 데이터시트(HTML) 11 Page - Analog Devices

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AD5330/AD5331/AD5340/AD5341
Rev. A | Page 11 of 28
TERMINOLOGY
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
OFFSET
GAIN ERROR
AND
OFFSET ERROR
ACTUAL
IDEAL
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or INL is a measure of the
maximum deviation, in LSBs, from a straight line passing
through the actual endpoints of the DAC transfer function.
Typical INL vs. code plots can be seen in Figure 14, Figure 15,
and Figure 16.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of ±1 LSB maximum ensures mono-
tonicity. This DAC is guaranteed monotonic by design. Typical
DNL vs. code plots can be seen in Figure 17, Figure 18, and
Figure 19.
Gain Error
This is a measure of the span error of the DAC (including any
error in the gain of the buffer amplifier). It is the deviation in
slope of the actual DAC transfer characteristic from the ideal,
expressed as a percentage of the full-scale range. This is
illustrated in Figure 11.
Figure 12. Positive Offset Error and Gain Error
OUTPUT
VOLTAGE
DAC CODE
NEGATIVE
OFFSET
GAIN ERROR
AND
OFFSET ERROR
ACTUAL
IDEAL
AMPLIFIER
FOOTROOM
(~1mV)
NEGATIVE
OFFSET
DEADBAND CODES
Offset Error
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
If the offset voltage is positive, the output voltage is still positive
at zero input code. This is shown in Figure 12. Because the
DACs operate from a single supply, a negative offset cannot
appear at the output of the buffer amplifier. Instead, there is
a code close to zero at which the amplifier output saturates
(amplifier footroom). Below this code, there is a deadband over
which the output voltage does not change. This is illustrated in
Figure 13.
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
GAIN ERROR
ACTUAL
IDEAL
NEGATIVE
GAIN ERROR
Figure 13. Negative Offset Error and Gain Error
Figure 11. Gain Error


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