FM1608B – 64Kb Bytewide 5V F-RAM

Document Number: 001-86211 Rev. *A

Page 5 of 14

A second design consideration relates to the level of

backup. They typically block user access below a

battery with current demand from an active SRAM.

The user can be abruptly cut off from access to the

nonvolatile memory in a power down situation with

no warning or indication.

F-RAM memories do not need this system overhead.

that complies with the specified operating range. The

user should take measures to prevent the processor

tolerance. The common design practice of holding a

processor in reset during powerdown may be

sufficient.

It is recommended that Chip Enable is

and powerdown cycles. It is the user’s responsibility

to ensure that chip enable is high to prevent accesses

Figure 3 shows a pullup

resistor on /CE which will keep the pin high during

power cycles assuming the MCU/MPU pin tri-states

during the reset condition. The pullup resistor value

a high enough value that the current drawn when /CE

is low is not an issue.

Figure 3. Use of Pullup Resistor on /CE

CE

WE

OE

A(12:0)

DQ

FM1608B

MCU/

MPU

R