SI4812BDY datasheet(11/24 Pages) VISHAY

부품명	SI4812BDY

상세설명	6 A, microBUCK SiC414, SiC424 Integrated Buck Regulator with 5 V LDO

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Vishay Siliconix

SiC414, SiC424

Document Number: 63388

S13-0248-Rev. B, 04-Feb-13

www.vishay.com

11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: powerictechsupport@vishay.com

power-save enabled. The SiC414 ultrasonic power-save

operation maintains a minimum switching frequency of

25 kHz, for applications with stringent audio requirements.

When EN/PSV is high (above 45 % of the voltage at V5V) for

SiC424, the switching regulator turns on with power-save

enabled. The SiC424 power-save operation is designed to

maximize efficiency at light loads with no minimum frequency

limits. This makes the SiC424 an excellent choice for

portable and battery-operated systems.

The ENL input is used to control the internal LDO. This input

provides a second function by acting as a VIN ULVO sensor

for the switching regulator. When ENL is low (grounded), the

LDO is off. When ENL is a logic high but below the VIN UVLO

threshold (2.6 V typical), then the LDO is on and the switcher

is off. When ENL is above the VIN UVLO threshold, the LDO

is enabled and the switcher is also enabled if the EN/PSV pin

is not grounded.

Forced Continuous Mode Operation

The SiC414 and SiC424 operates the switcher in Forced

Continuous Mode (FCM) by floating the EN/PSV pin (see

figure 4). In this mode of operation, the MOSFETs are turned

on alternately to each other with a short dead time between

them to avoid cross conduction. This feature results in

uniform frequency across the full load range with the

trade-off being poor efficiency at light loads due to the

high-frequency switching of the MOSFETs.

For V5V < 4.5 V, it is recommended to force 33 % of the V5V

voltage on the EN/PSV pin to operate in forced continuous

mode.

Ultrasonic Power-Save Operation (SiC414)

The SiC414 provides ultrasonic power-save operation at

light loads, with the minimum operating frequency fixed at

slightly under 25 kHz. This is accomplished by using an

internal timer that monitors the time between consecutive

high-side gate pulses. If the time exceeds 40 µs, DL drives

high to turn the low-side MOSFET on. This draws current

from VOUT through the inductor, forcing both VOUT and VFB

to fall. When VFB drops to the 750 mV threshold, the next DH

(the drive signal for the high side FET) on-time is triggered.

After the on-time is completed the high-side MOSFET is

turned off and the low-side MOSFET turns on. The low-side

MOSFET remains on until the inductor current ramps down

to zero, at which point the low-side MOSFET is turned off.

Because the on-times are forced to occur at intervals no

greater than 40 µs, the frequency will not fall far below

25 kHz. Figure 5 shows ultrasonic power-save operation.

Power-Save Mode Operation (SiC424)

The SiC424 provides power-save operation at light loads

with no minimum operating frequency. With power-save

enabled, the internal zero crossing comparator monitors the

inductor current via the voltage across the low-side MOSFET

during the off-time. If the inductor current falls to zero for 8

consecutive

switching

cycles,

the

controller

enters

power-save operation. It will turn off the low-side MOSFET

on each subsequent cycle provided that the current crosses

zero. At this time both MOSFETs remain off until VFB drops

to the 750 mV threshold. Because the MOSFETs are off , the

load is supplied by the output capacitor. If the inductor

current does not reach zero on any switching cycle, the

controller immediately exits powersave and returns to forced

continuous mode. Figure 6 shows power-save mode

operation at light loads.

Figure 4 - Forced Continuous Mode Operation

FB ripple

voltage (VFB)

Inductor

current

DC load current

FB threshold

(750 mV)

DH

DL

On-time

(tON)

DH on-time is triggered when

VFB reaches the FB threshold

DL drives high when on-time is completed.

DL remains high until VFB falls to the FB threshold.

Figure 5 - Ultrasonic Power-Save Operation

After the 40 μs time - out, DL drives high if VFB has not reached the FB threshold

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