전자부품 데이터시트 검색엔진 |
|
CDCU877ARHA 데이터시트(PDF) 11 Page - Texas Instruments |
|
CDCU877ARHA 데이터시트(HTML) 11 Page - Texas Instruments |
11 / 23 page www.ti.com RECOMMENDED AVDD FILTERING V DDQ GND CARD VIA CARD VIA Bead 0603 4.7 F m 1206 0.1 F m 0603 2200pF 0603 AV DD AGND PLL 1 W CDCU877,, CDCU877A 1.8-V PHASE LOCK LOOP CLOCK DRIVER SCAS688D – JUNE 2005 – REVISED JULY 2007 PARAMETER MEASUREMENT INFORMATION (continued) Figure 11. Time Delay Between OE and Clock Output (Y, Y) A. Place the 2200-pF capacitor close to the PLL. B. Use a wide trace for the PLL analog power and ground. Connect PLL and capacitors to AGND trace and connect trace to one GND via (farthest from the PLL). C. Recommended bead: Fair-Rite PN 2506036017Y0 or equilvalent (0.8 Ω dc maximum, 600 Ω at 100 MHz). Figure 12. Recommended AVDD Filtering 11 Submit Documentation Feedback |
유사한 부품 번호 - CDCU877ARHA |
|
유사한 설명 - CDCU877ARHA |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |