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ADR06 데이터시트(PDF) 4 Page - Analog Devices

부품명 ADR06
상세설명  12-/14-Bit High Bandwidth Multiplying DACs with Serial Interface
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ADR06 데이터시트(HTML) 4 Page - Analog Devices

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AD5444/AD5446
Data Sheet
Rev. E | Page 4 of 28
Parameter
Min
Typ
Max
Unit
Conditions
DYNAMIC PERFORMANCE1
Reference Multiplying Bandwidth
12
MHz
VREF = ±3.5 V, DAC loaded with all 1s
Multiplying Feedthrough Error
VREF = ±3.5 V, DAC loaded with all 0s
72
dB
100 kHz
64
dB
1 MHz
44
dB
10 MHz
Output Voltage Settling Time
VREF = 10 V, RLOAD = 100 Ω, DAC latch alternately
loaded with 0s and 1s
Measured to ±1 mV of FS
100
110
ns
Measured to ±4 mV of FS
24
40
ns
Measured to ±16 mV of FS
16
33
ns
Digital Delay
20
40
ns
Interface delay time
10%-to-90% Settling Time
10
30
ns
Rise and fall time, VREF = 10 V, RLOAD = 100 Ω
Digital-to-Analog Glitch Impulse
2
nV-s
1 LSB change around major carry, VREF = 0 V
Output Capacitance
IOUT1
13
pF
DAC latches loaded with all 0s
28
pF
DAC latches loaded with all 1s
IOUT2
18
pF
DAC latches loaded with all 0s
5
pF
DAC latches loaded with all 1s
Digital Feedthrough
0.5
nV-s
Feedthrough to DAC output with CS high and
alternate loading of all 0s and all 1s
Analog THD
83
dB
VREF = 3.5 V p-p, all 1s loaded, f = 1 kHz
Digital THD
Clock = 1 MHz, VREF = 3.5 V
50 kHz fOUT
71
dB
20 kHz fOUT
77
dB
Output Noise Spectral Density
25
nV/√Hz
@ 1 kHz
SFDR Performance (Wide Band)
Clock = 10 MHz, VREF = 3.5 V
50 kHz fOUT
78
dB
20 kHz fOUT
74
dB
SFDR Performance (Narrow Band)
Clock = 1 MHz, VREF = 3.5 V
50 kHz fOUT
87
dB
20 kHz fOUT
85
dB
Intermodulation Distortion
79
dB
f1 = 20 kHz, f2 = 25 kHz, clock = 1 MHz, VREF = 3.5 V
POWER REQUIREMENTS
Power Supply Range, VDD
2.5
5.5
V
Supply Current, IDD
0.4
10
µA
TA = −40°C to +125°C, logic inputs = 0 V or VDD
0.6
µA
TA = 25°C, logic inputs = 0 V or VDD
Power Supply Sensitivity1
0.001
%/%
∆VDD = ±5%
1
Guaranteed by design and characterization; not subject to production test.


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