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74HC74D 데이터시트(PDF) 9 Page - NXP Semiconductors |
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74HC74D 데이터시트(HTML) 9 Page - NXP Semiconductors |
9 / 22 page 74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 27 August 2012 9 of 21 NXP Semiconductors 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive edge-trigger [1] All typical values are measured at Tamb =25 C. [2] tpd is the same as tPLH and tPHL. [3] tt is the same as tTHL and tTLH. [4] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi N+ (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (C L VCC 2 f o) = sum of outputs. th hold time nD to nCP; see Figure 7 VCC = 4.5 V 3 3- 3 - ns fmax maximum frequency nCP; see Figure 7 VCC = 4.5 V 22 54 - 18 - MHz VCC =5V; CL =15pF - 59 - - - MHz CPD power dissipation capacitance CL =50pF;f= 1 MHz; VI =GND to VCC - 1.5 V [4] -29 - - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9. Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ[1] Max Min Max |
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