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SI5330K-A00224-GM 데이터시트(PDF) 11 Page - Silicon Laboratories

부품명 SI5330K-A00224-GM
상세설명  Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
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제조업체  SILABS [Silicon Laboratories]
홈페이지  http://www.silabs.com
Logo SILABS - Silicon Laboratories

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Si5330
Rev. 1.0
11
7
VDD
VDD
Supply
Core Supply Voltage.
The device operates from a 1.8, 2.5, or 3.3 V supply. A
0.1 µF bypass capacitor should be located very close to
this pin.
8
LOS
O
Open Drain
Loss of Signal Indicator.
0 = CLKIN present.
1 = Loss of signal (LOS).
This pin requires an external
1kpull-up resistor.
9
CLK3B
O
Multi
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
10
CLK3A
O
Multi
Si5330A/B/C/K/L/M Differential Devices.
This is the positive side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
11
VDDO3
VDD
Supply
Output Clock Supply Voltage.
Supply voltage for CLK3A/B. Use a 0.1 µF bypass cap
as close as possible to this pin. If CLK3 is not used, this
pin must be tied to VDD (pin 7 and/or pin 24).
12
RSVD_GND
Ground.
Must be connected to system ground.
13
CLK2B
O
Multi
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK2 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK2 outputs. Both
CLK2A and CLK2B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Table 10. Si5330 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Type
Description


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제조업체부품명데이터시트상세설명
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