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TC358743 데이터시트(PDF) 1 Page - Toshiba Semiconductor

부품명 TC358743
상세설명  HDMI video and audio streams into MIPI CSI-2 data to enable Application Processors with MIPI CSI-2
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC358743 데이터시트(HTML) 1 Page - Toshiba Semiconductor

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Product Brief
TC358743 Camera Serial Interface
Converter Chipset (HDMI to MIPI
®)
Description
The Toshiba High Definition Multimedia Interface
(HDMI) to Mobile Industry Processor Interface (MIPI
R )
Camera Serial Interface Type 2 (CSI-2) converter
chipset, designated TC358743XBG, enables a Host
processor with a MIPI CSI-2 interface to accept HDMI
video and audio streams and process them as
incoming data source. Application Processors can
generate different types of video data for internal
displays, external displays, as well as analog TV and
HDMI TV; but some Application Processors have
limitations in handling video data as an input source. A
common input interface for video streams is MIPI
CSI-2, which is a high-speed serial interface to an
embedded camera. The Toshiba bridge,
TC358743XBG, enables HDMI video stream to be
processed by the Application Processor as a CSI-2
video stream. Audio is supported and can be
transmitted over CSI-2 stream or over I
2S.
The maximum resolution supported is 1080P at a
refresh rate of 60 fps. The bridge supports common 3D
video formats and protocols compatible with the HDMI
1.4 standard. The TC358743XBG supports a MIPI
CSI-2 interface to the Host with configurable 1, 2,
3, or 4 data lanes with lane speeds of up to 1 Gbps per
lane.
The Toshiba TC358743XBG is a 64-pin device and is
optimized for the portable market. It has a small
package size of 6 mm x 6 mm, 0.65 mm ball pitch. It is
designed with clock and power management circuitry to
support lowpower states.
Features
HDMI-RX Interface
• HDMI 1.4
– Video Formats Support (Up to 1080P)
• RGB, YUV444: 24-bpp@60 fps
• YUV422 24-bpp @60 fps
– Audio Supports
• Internal Audio PLL to track N/CTS value transmitted by
the ACR packet
– 3D support
– Support for HDCP (High-bandwidth Digital Content
Protection)
– Support for DDC (Display Data Channel)
Highlights
• HDMI video and audio streams into MIPI
R
CSI-2 data to enable Application Processors with MIPI CSI-2
interface to process HDMI as input stream.
• Solutions are based on the latest versions of industry standards for HDMI 1.4 and MIPI CSI-2 1.01 interfaces.
• Support for common 3D formats and compatible protocols with the HDMI 1.4 standard
• Support for 1080P resolution at refresh rates of 60 fps.
• Applicable to products such as smart TVs, set-top boxes, and DVRs (digital video recorders)
TC358743XBG Block Diagram: HDMI to CSI-2 Bridge Chip
X
EDID
Master
TMDS
Rx
HDMI2CSI
SYS
DDC
Slave
HDCP
Keys
RegFile &
EDID
_SRAM
CSI2
Packetizer
Video
FIFO
Audio
De-Packet
CEC
APLL
Audio
I
2C
Slave
EDID_SCL
IR
IR
INT
CSICP/N
I
2S
I
2C_SCL
CSID0P/N
CSID1P/N
CSID3P/N
CSID2P/N
CSI2
Tx
I
2C_SDA
Application
Processor
EDID_SDA
REFCLK
RESETN
Authentication
Engine
DDC_SCL
DDC_SDA
HDCP
Decryption
Engine
HDMID0P/N
HDMID1P/N
HDMID2P/N
HDMIDCP/N
CEC
HPDo
HPDi


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