AD73311ARS datasheet(7/36 Pages) AD

부품명	AD73311ARS

상세설명	Low Cost, Low Power CMOS General Purpose Analog Front End

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AD73311

–7–

REV. B

t1

t2

t3

Figure 1. MCLK Timing

TIMING CHARACTERISTICS

Limit at

Parameter

TA = –40 C to +85 C

Unit

Description

Clock Signals

See Figure 1

t1

61

ns min

MCLK Period

t2

24.4

ns min

MCLK Width High

t3

24.4

ns min

MCLK Width Low

Serial Port

See Figures 3 and 4

t4

t1

ns min

SCLK Period

t5

0.4

× t1

ns min

SCLK Width High

t6

0.4

× t1

ns min

SCLK Width Low

t7

20

ns typ

SDI/SDIFS Setup Before SCLK Low

t8

0

ns typ

SDI/SDIFS Hold After SCLK Low

t9

10

ns typ

SDOFS Delay from SCLK High

t10

10

ns typ

SDOFS Hold After SCLK High

t11

10

ns typ

SDO Hold After SCLK High

t12

10

ns typ

SDO Delay from SCLK High

t13

30

ns typ

SCLK Delay from MCLK

(AVDD = +5 V

10%; DVDD = +5 V

10%; AGND = DGND = 0 V; TA = TMlN to TMAX, unless

otherwise noted)

100 AIOL

100 AIOH

CL

15pF

+2.1V

TO OUTPUT

Figure 2. Load Circuit for Timing Specifications

t1

t2

t3

t13

t5

t6

t4

MCLK

SCLK

*

SCLK IS INDIVIDUALLY PROGRAMMABLE

IN FREQUENCY (MCLK/4 SHOWN HERE).

*

Figure 3. SCLK Timing

유사한 부품 번호 - AD73311ARS

제조업체	부품명	데이터시트	상세설명
Analog Devices	AD73311ARS	334Kb / 36P	Low Cost, Low Power CMOS General Purpose Analog Front End REV. B

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유사한 설명 - AD73311ARS

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Analog Devices	AD73311LARUZ	357Kb / 36P	Low Cost, Low Power CMOS General Purpose Analog Front End REV. A
	AD73311	340Kb / 36P	Low Cost, Low Power CMOS General Purpose Analog Front End REV. B
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	AD73311ARZ-REEL	340Kb / 36P	Low Cost, Low Power CMOS General Purpose Analog Front End REV. B
	AD73311LARUZ-RL7	340Kb / 36P	Low Cost, Low Power CMOS General Purpose Analog Front End REV. B
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	AD73322	386Kb / 43P	Low Cost, Low Power CMOS General-Purpose Dual Analog Front End REV. B

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AD73311ARS 데이터시트(PDF) 7 Page - Analog Devices

AD73311ARS 데이터시트(HTML) 7 Page - Analog Devices

유사한 부품 번호 - AD73311ARS

유사한 설명 - AD73311ARS

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