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AD9235BRUZRL7-40 데이터시트(PDF) 1 Page - Analog Devices |
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AD9235BRUZRL7-40 데이터시트(HTML) 1 Page - Analog Devices |
1 / 40 page 12-Bit, 20/40/65 MSPS 3 V A/D Converter Data Sheet AD9235 Rev. D InformationfurnishedbyAnalogDevicesisbelievedtobeaccurateandreliable.However,nore- sponsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No licenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved. FEATURES Single 3 V supply operation (2.7 V to 3.6 V) SNR = 70 dBc to Nyquist at 65 MSPS SFDR = 85 dBc to Nyquist at 65 MSPS Low power: 300 mW at 65 MSPS Differential input with 500 MHz bandwidth On-chip reference and SHA DNL = ±0.4 LSB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary or twos complement data format Clock duty cycle stabilizer APPLICATIONS Ultrasound equipment IF sampling in communications receivers IS-95, CDMA-One, IMT-2000 Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes FUNCTIONAL BLOCK DIAGRAM SHA VIN+ VIN– DRVDD 8-STAGE 1 1/2-BIT PIPELINE CLK PDWN MODE CLOCK DUTY CYCLE STABILIZER MODE SELECT DGND OTR D11 D0 AVDD MDAC1 CORRECTION LOGIC OUTPUT BUFFERS REF SELECT AGND 0.5V VREF SENSE AD9235 REFT REFB A/D A/D 4 16 12 3 Figure 1. GENERAL DESCRIPTION The AD9235 is a family of monolithic, single 3 V supply, 12-bit, 20/40/65 MSPS analog-to-digital converters (ADCs). This family features a high performance sample-and-hold amplifier (SHA) and voltage reference. The AD9235 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the full operating temperature range. The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9235 is suitable for applications in communica- tions, imaging, and medical ultrasound. A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that can be used with the most significant bit to determine low or high overflow. Fabricated on an advanced CMOS process, the AD9235 is avail- able in a 28-lead TSSOP and a 32-lead LFCSP and is specified over the industrial temperature range (–40°C to +85°C). PRODUCT HIGHLIGHTS 1. The AD9235 operates from a single 3 V power supply and features a separate digital output driver supply to accommo- date 2.5 V and 3.3 V logic families. 2. Operating at 65 MSPS, the AD9235 consumes a low 300 mW. 3. The patented SHA input maintains excellent performance for input frequencies up to 100 MHz and can be configured for single-ended or differential operation. 4. The AD9235 pinout is similar to the AD9214-65, a 10-bit, 65 MSPS ADC. This allows a simplified upgrade path from 10 bits to 12 bits for 65 MSPS systems. 5. The clock DCS maintains overall ADC performance over a wide range of clock pulse widths. 6. The OTR output bit indicates when the signal is beyond the selected input range. |
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