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TSB41AB1PHP 데이터시트(PDF) 4 Page - Texas Instruments |
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TSB41AB1PHP 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 70 page TSB41AB1 IEEE 1394a2000 ONEPORT CABLE TRANSCEIVER/ARBITER SLLS423I − JUNE 2000 − REVISED MARCH 2005 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 description (continued) required for normal network operation regardless of the state of the PHY-LLC interface. When the interface is in the reset or disabled state and LPS is again observed active, the PHY initializes the interface and returns it to normal operation. When the PHY-LLC interface is in the low-power disabled state, the TSB41AB1 automatically enters a low-power mode if the port is inactive (disconnected, disabled, or suspended). In this low-power mode, the TSB41AB1 disables its internal clock generators and also disables various voltage and current reference circuits depending on the state of the port (some reference circuitry must remain active in order to detect new cable connections, disconnections, or incoming TPBIAS, for example). The lowest power consumption (the ultralow-power sleep mode) is attained when the port is either disconnected, or disabled with the port interrupt enable bit cleared. The TSB41AB1 exits the low-power mode when the LPS input is asserted high or when a port event occurs which requires that the TSB41AB1 become active in order to respond to the event or to notify the LLC of the event (for example, incoming bias is detected on a suspended port, a disconnection is detected on a suspended port, a new connection is detected on a nondisabled port, etc.). The SYSCLK output becomes active (and the PHY-LLC interface is initialized and becomes operative) within 7.3 ms after LPS is asserted high when the TSB41AB1 is in the low-power mode. The PHY uses the C/LKON terminal to notify the LLC to power up and become active. When activated, the C/LKON signal is a square wave of approximately 163-ns period. The PHY activates the C/LKON output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the LPS input is inactive, as described above, or the LCtrl bit is cleared to 0. A wake-up event occurs when a link-on PHY packet addressed to this node is received, or when a PHY interrupt occurs. The PHY deasserts the C/LKON output when the LLC becomes active (both LPS active and the LCtrl bit set to 1). The PHY also deasserts the C/LKON output when a bus reset occurs unless a PHY interrupt condition exists which would otherwise cause C/LKON to be active. PHP package terminal diagram 14 15 AGND AVDD R1 R0 AGND TPBIAS TPA+ TPA− TPB+ TPB− AGND AVDD 36 35 34 33 32 31 30 29 28 27 26 25 16 1 2 3 4 5 6 7 8 9 10 11 12 SYSCLK CTL0 CTL1 D0 D1 D2 D3 D4 D5 D6 D7 PD 17 18 19 20 47 46 45 44 43 48 42 40 39 38 41 21 22 23 24 37 13 PHP PACKAGE (TOP VIEW) TSB41AB1 NOTE A: For latch-up considerations, it is recommended that the TESTM terminal have a pullup resistor. |
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