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AD9961 데이터시트(PDF) 9 Page - Analog Devices

부품명 AD9961
상세설명  10-/12-Bit, Low Power, Broadband MxFE
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AD9961 데이터시트(HTML) 9 Page - Analog Devices

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Data Sheet
AD9961/AD9963
Rev. A | Page 9 of 60
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AUX33V
AUXADCREF
RXQP
RXQN
RXGND
RXBIAS
RX18V
RX33V
RX18VF
RXCML
RXGND
RXIN
RXIP
LDO_EN
RESET
SCLK
17
CS
18
SDIO
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
DLLFILT
DLL18V
DVDD18
DRVDD
NC
NC
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
TXD8
TXD9
TXIQ/TXnRX
TXCLK
NOTES
1. EXPOSED PAD MUST BE SOLDERED TO PCB.
2. NC = NO CONNECT.
PIN 1
INDICATOR
AD9961
(TOP VIEW)
Figure 2. AD9961 Pin Configuration
Table 8. AD9961 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
AUX33V
Analog Supply for the Auxiliary ADC and Auxiliary DACs (3.3 V ± 5%, 1.8 V ± 5% If Auxiliary ADC Is
Powered Down).
2
AUXADCREF
Reference Output (Or Input) for Auxiliary ADC.
3, 4
RXQP, RXQN
Differential ADC Q Inputs. The default full-scale input voltage range is 1.56 V p-p differential.
5, 11
RXGND
Receive Path Ground.
6
RXBIAS
External Bias Resistor Connection. An optional 10 kΩ resistor can be connected between this pin and the
analog ground to improve the accuracy of the full-scale range of the Rx ADCs.
7
RX18V
Output of RX18V Voltage Regulator.
8
RX33V
Input to RX18V and RX18VF Voltage Regulators (2.5 V to 3.3 V). If LDOs are not being used, short Pin 8 to
Pin 7.
9
RX18VF
Output of RX18VF Voltage Regulator.
10
RXCML
ADC Common-Mode Voltage Output.
12, 13
RXIN, RXIP
Differential ADC I Inputs. The default full-scale input voltage range is 1.56 V p-p differential.
14
LDO_EN
Control Pin for LDOs (GND = Disable all LDOs, Float = Enable DVDD18 LDO Only, DRVDD = Enable All
LDOs).
15
RESET
Reset. Active low to reset the configuration registers to default values and reset device.
16
SCLK
Clock Input for Serial Port.
17
CS
Active Low Chip Select.
18
SDIO
Bidirectional Data Line for Serial Port.
19, 34
DGND
Digital Core Ground.
20, 33, 51
DRVDD
Input/Output Pad Ring Supply Voltage (1.8 V to 3.3 V).
21 to 30
TRXD9 to TRXD0
ADC Output Data in Full Duplex Mode. ADC output data and DAC input data in half-duplex mode.
31, 32,
49, 50
NC
Not Connected.
35
TRXIQ
Output Signal Indicating from Which ADC the Output Data Is Sourced.


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