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AD5161BRMZ50 데이터시트(PDF) 7 Page - Analog Devices |
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AD5161BRMZ50 데이터시트(HTML) 7 Page - Analog Devices |
7 / 20 page Data Sheet AD5161 Rev. B | Page 7 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 10 9 8 7 6 A B CS/ADO SDO/NC SDI/SDA DD AD5161 TOP VIEW (Not to Scale) W V DIS GND CLK/SCL Figure 3. Pin Configuration Table 5. Pin Function Description Pin No. Mnemonic Description 1 A A Terminal. 2 B B Terminal. 3 CS/AD0 Chip Select (CS) Input, Active Low. When CS returns high, data will be loaded into the DAC register. Programmable address bit 0 (AD0) for multiple package decoding. 4 SDO/NC Serial Data Output (SDO). Open-drain transistor requires pull-up resistor. No Connect (NC). 5 SDI/SDA Serial Data Input (SDI). Serial Data Input/Output (SDA). 6 CLK/SCL Serial Clock Input. Positive edge triggered. 7 GND Digital Ground. 8 DIS Digital Interface Select (SPI/I2C Select). SPI when DIS = 0, I2C when DIS = 1. 9 V DD Positive Power Supply. 10 W W Terminal. |
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