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LMZ30606 데이터시트(PDF) 4 Page - Texas Instruments |
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LMZ30606 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 25 page PWRGD VIN PGND PH VOUT RT/CLK VADJ STSEL SS/TR VSENSE+ LMZ30606 PWRGD Logic + + VREF Comp Power Stage and Control Logic Thermal Shutdown Shutdown Logic VIN UVLO OSC w/PLL INH/UVLO AGND OCP LMZ30606 SNVS995 – JULY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over -40°C to 85°C free-air temperature, VIN = 3.3 V, VOUT = 1.8 V, IOUT = 6A, CIN1 = 47 µF ceramic, CIN2 = 220 µF poly-tantalum, COUT1 = 47 µF ceramic, COUT2 = 100 µF poly-tantalum (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Ceramic 47 (5) CIN External input capacitance µF Non-ceramic 220(5) Ceramic 47 (6) 150 650(7) µF COUT External output capacitance Non-ceramic 100(6) 2000(7) Equivalent series resistance (ESR) 25 m Ω (5) A minimum of 47µF of ceramic capacitance is required across the input for proper operation. Locate the capacitor close to the device. An additional 220µF of bulk capacitance is recommended. See Table 4 for more details. (6) The amount of required output capacitance varies depending on the output voltage (see Table 3 ). The amount of required capacitance must include at least 47µF of ceramic capacitance. Locate the capacitance close to the device. Adding additional capacitance close to the load improves the response of the regulator to load transients. See Table 3 and Table 4 for more details. (7) When using both ceramic and non-ceramic output capacitance, the combined maximum must not exceed 2200µF. PACKAGE SPECIFICATIONS LMZ30606 UNIT Weight 0.85 grams Flammability Meets UL 94 V-O MTBF Calculated reliability Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign 32.8 MHrs DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAM 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMZ30606 |
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