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54F175DMQB 데이터시트(PDF) 4 Page - Texas Instruments |
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54F175DMQB 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 23 page LMP91050 SNAS517D – NOVEMBER 2011 – REVISED MARCH 2013 www.ti.com Operating Ratings (1) Supply Voltage 2.7V to 5.5V Junction Temperature Range (2) -40°C to 105°C Package Thermal Resitance, θJA 10 Lead VSSOP 176 °C/W (1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Operating Ratings is not implied. Operating Ratings indicate conditions at which the device is functional and the device should not be operated beyond such conditions. (2) The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA All numbers apply for packages soldered directly onto a PC board. Electrical Characteristics (1) The following specifications apply for VDD = 3.3V, VCM = 1.15V, Bold values for TA = -40°C to +85°C unless otherwise specified. All other limits apply to TA = TJ = +25°C. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units Power Supply VDD Supply Voltage 2.7 3.3 5.5 V IDD Supply Current All analog block ON 3.1 3.7 4.2 mA Power Down Supply Current All analog block OFF 45 85 121 μA Offset Cancellation (Offset DAC) Resolution 256 steps LSB All gains 33.8 mV DNL -1 2 LSB Error Output referred offset error, all gains ±100 mV VDD – Offset adjust Range Output referred, all gains 0.2 V 0.2 DAC settling time 480 μs Programmable Gain Amplifier (PGA) 1st Stage, RL = 10kΩ, CL = 15pF IBIAS Bias Current 5 200 pA VINMAX Max input signal High gain Referenced to CMOUT voltage, it refers to the ±2 mV _HGM mode maximum voltage at the IN pin before clipping; It includes dark voltage of the thermopile and VINMAX Max input signal Low gain ±12 mV signal voltage. _LGM mode VOS Input Offset Voltage -165 µV G _HGM Gain High gain mode 250 V/V G_LGM Gain Low gain mode 42 V/V GE Gain Error Both HGM and LGM 2.5 % VDD – VOUT Output Voltage Range 0.5 0.5 V 1mV input step signal, HGM, Vout measured at PhDly Phase Delay 6 μs Vdd/2 Phase Delay variation with 1mV input step signal, HGM, Vout measured at TCPhDly 416 ns Temperature Vdd/2, SSBW Small Signal Bandwidth Vin = 1mVpp, Gain = 250 V/V 18 kHz Cin Input Capacitance 100 pF (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically. (2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. (3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. 4 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LMP91050 |
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