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74AHC574D118 데이터시트(PDF) 4 Page - NXP Semiconductors |
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74AHC574D118 데이터시트(HTML) 4 Page - NXP Semiconductors |
4 / 18 page ![]() 74AHC_AHCT574_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 24 January 2008 4 of 18 NXP Semiconductors 74AHC574; 74AHCT574 Octal D-type flip-flop; positive edge-trigger; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 5. Pin configuration SO20, TSSOP20 Fig 6. Pin configuration DHVQFN20 74AHC574 74AHCT574 OE VCC D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 GND CP 001aah037 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 001aah666 74AHC574 74AHCT574 Transparent top view Q7 D6 D7 Q6 D5 Q5 D4 Q4 D3 Q3 D2 Q2 GND(1) D1 Q1 D0 Q0 9 12 8 13 7 14 6 15 5 16 4 17 3 18 2 19 terminal 1 index area Table 2. Pin description Symbol Pin Description OE 1 3-state output enable input (active LOW) D[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input GND 10 ground (0 V) CP 11 clock input (LOW-to-HIGH, edge triggered) Q[0:7] 19, 18, 17, 16, 15, 14, 13, 12 3-state flip-flop output VCC 20 supply voltage |
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