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IRF6713SPBF 데이터시트(PDF) 1 Page - International Rectifier |
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1 / 9 page www.irf.com 1 08/19/08 IRF6713SPbF IRF6713STRPbF DirectFET Power MOSFET Description The IRF6713SPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack- age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6713SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6713SPbF has been optimized for parameters that are critical in synchronous buck operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses. Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) Fig 1. Typical On-Resistance Vs. Gate Voltage Typical values (unless otherwise specified) Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.23mH, RG = 25Ω, IAS = 17A. Notes: DirectFET ISOMETRIC SQ SQ SX ST MQ MX MT MP l RoHS Compliant Containing No Lead and Bromide l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Ultra Low Package Inductance l Optimized for High Frequency Switching l Ideal for CPU Core DC-DC Converters l Optimized for both Sync.FET and some Control FET application l Low Conduction and Switching Losses l Compatible with existing Surface Mount Techniques l 100% Rg tested 2 4 6 8 10 12 14 16 VGS, Gate -to -Source Voltage (V) 1 2 3 4 5 ID = 22A TJ = 25°C TJ = 125°C 0 102030 QG Total Gate Charge (nC) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 VDS= 20V VDS= 13V ID= 17A Absolute Maximum Ratings Parameter Units VDS Drain-to-Source Voltage V VGS Gate-to-Source Voltage ID @ TA = 25°C Continuous Drain Current, VGS @ 10V e ID @ TA = 70°C Continuous Drain Current, VGS @ 10V e A ID @ TC = 25°C Continuous Drain Current, VGS @ 10V f IDM Pulsed Drain Current g EAS Single Pulse Avalanche Energy h mJ IAR Avalanche Current Ãg A Max. 17 95 170 ±20 25 22 34 17 Qg tot Qgd Qgs2 Qrr Qoss Vgs(th) 21nC 6.3nC 2.7nC 18nC 14nC 1.9V VDSS VGS RDS(on) RDS(on) 25V max ±20V max 2.2mΩ@ 10V 3.5mΩ@ 4.5V PD - 96129A |
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