전자부품 데이터시트 검색엔진 |
|
AD7484BSTZ 데이터시트(PDF) 8 Page - Analog Devices |
|
AD7484BSTZ 데이터시트(HTML) 8 Page - Analog Devices |
8 / 20 page AD7484 Rev. C | Page 8 of 20 Pin No. Mnemonic Description 40 D14 Data Output Bit for Overranging. If the overrange feature is not used, this pin should be pulled to DGND via a 100 kΩ resistor. 41 CONVST Convert Start Logic Input. A conversion is initiated on the falling edge of the CONVST signal. The input track- and-hold amplifier goes from track mode to hold mode, and the conversion process commences. 42 RESET Reset Logic Input. An active low reset pulse must be applied to this pin after power-up to ensure correct operation. A falling edge on this pin resets the internal state machine and terminates a conversion that may be in progress. The contents of the offset register will also be cleared on this edge. Holding this pin low keeps the part in a reset state. 43 MODE2 Operating Mode Logic Input. See Table 8 for details. 44 MODE1 Operating Mode Logic Input. See Table 8 for details. 45 CLIP Logic Input. A logic high on this pin enables output clipping. In this mode, any input voltage that is greater than positive full scale or less than negative full scale will be clipped to all 1s or all 0s, respectively. Further details are given in the Offset/Overrange section. |
유사한 부품 번호 - AD7484BSTZ |
|
유사한 설명 - AD7484BSTZ |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |