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AM28F020 데이터시트(PDF) 18 Page - Advanced Micro Devices

부품명 AM28F020
상세설명  2 Megabit (256 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
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제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM28F020 데이터시트(HTML) 18 Page - Advanced Micro Devices

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Am28F020
Figure 4.
AC Waveforms for Programming Operations
ANALYSIS OF PROGRAM TIMING WAVEFORMS
Program Setup/Program
Two-cycle write commands are required for program
operations (section A and B). The first program com-
mand (40h) is a Setup command and does not affect
the array data (section A).The second program com-
mand latches address and data required for program-
ming on the falling and rising edge of WE# respectively
(section B). The rising edge of this WE# pulse (section
B) also initiates the programming pulse. The device is
programmed on a byte by byte basis either sequentially
or randomly.
The program pulse occurs in section C.
Time-Out
A software timing routine (10 µs duration) must be initi-
ated on the rising edge of the WE# pulse of section B.
Note: An integrated stop timer prevents any possibility
of overprogramming by limiting each time-out period of
10 µs.
Program-Verify
Upon completion of the program timing routine, the mi-
croprocessor must write the program-verify command
(C0h). This command terminates the programming op-
eration on the rising edge of the WE# pulse (section D).
The program-verify command also stages the device
for data verification (section F). Another software timing
Addresses
CE
#
OE
#
WE
#
Data
VPP
VCC
11559G-9
Data
In
20h
Section
A0h
Data
Out
Bus Cycle
Write
Write
Time-out
Write
Time-out
Read
Standby
Command
40h
Program
Address,
Program Data
N/A
C0h
(Stops
Program)
N/A
Compare
Data
N/A
Function
Program
Setup
Program
Command
Latch
Address and
Data
Program
(10 µs)
Program
Verify
Transition
(6 µs)
Program
Verification
Proceed per
Programming
Algorithm
AB
D
E
F
CG
A
B
DE
F
CG


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