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AM28F020 데이터시트(PDF) 2 Page - Advanced Micro Devices |
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AM28F020 데이터시트(HTML) 2 Page - Advanced Micro Devices |
2 / 35 page 2 Am28F020 addresses and data needed for the programming and erase operations. For system design simplification, the Am28F020 is designed to support either WE# or CE# co ntrolled w rites. Durin g a sys tem write cy cle, addresses are latched on the falling edge of WE# or CE#, whichever occurs last. Data is latched on the rising edge of WE# or CE#, whichever occurs first. To simplify discussion, the WE# pin is used as the write cycle control pin throughout the rest of this data sheet. All setup and hold times are with respect to the WE# signal. AMD’s Flash technology combines years of EPROM and EEPROM experience to produce the highest levels of quality, reliability, and cost effectiveness. The Am28F020 electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are pro- gra mme d one byte at a time using the EPRO M programming mechanism of hot electron injection. PRODUCT SELECTOR GUIDE BLOCK DIAGRAM Family Part Number Am28F020 Speed Options (VCC = 5.0 V ± 10%) -70 -90 -120 -150 -200 Max Access Time (ns) 70 90 120 150 200 CE # (E#) Access (ns) 70 90 120 150 200 OE # (G#) Access (ns) 35 35 50 55 55 14727F-1 Erase Voltage Switch Input/Output Buffers Data Latch Y-Gating 2,097,152 Bit Cell Matrix X-Decoder Y-Decoder Chip Enable Output Enable Logic Program/Erase Pulse Timer Low VCC Detector Command Register WE# CE# OE# A0–A17 DQ0–DQ7 VCC VSS State Control VPP To Array Program Voltage Switch |
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