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AM28F020A-200PIB 데이터시트(PDF) 1 Page - Advanced Micro Devices |
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AM28F020A-200PIB 데이터시트(HTML) 1 Page - Advanced Micro Devices |
1 / 35 page FINAL Publication# 17502 Rev: D Amendment/+1 Issue Date: January 1998 Am28F020A 2 Megabit (256 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms DISTINCTIVE CHARACTERISTICS s High performance — Access times as fast as 70 ns s CMOS low power consumption — 30 mA maximum active current — 100 µA maximum standby current — No data retention power consumption s Compatible with JEDEC-standard byte-wide 32-pin EPROM pinouts — 32-pin PDIP — 32-pin PLCC — 32-pin TSOP s 100,000 write/erase cycles minimum s Write and erase voltage 12.0 V ±5% s Latch-up protected to 100 mA from –1 V to VCC +1 V s Embedded Erase Electrical Bulk Chip Erase — Five seconds typical chip erase, including pre-programming s Embedded Program — 14 µs typical byte program, including time-out — 4 seconds typical chip program s Command register architecture for microprocessor/microcontroller compatible write interface s On-chip address and data latches s Advanced CMOS flash memory technology — Low cost single transistor memory cell s Embedded algorithms for completely self-timed write/erase operations GENERAL DESCRIPTION The Am28F020A is a 2 Megabit Flash memory orga- nized as 256 Kbytes of 8 bits each. AMD’s Flash mem- ories offer the most cost-effective and reliable read/ write no n-volat ile ran dom access memor y. Th e Am28F020A is packaged in 32-pin PDIP, PLCC, and TSOP versions. It is designed to be reprogrammed and erased in-system or in standard EPROM programmers. The Am28F020A is erased wh en sh ip pe d from the factory. The standard Am28F020A offers access times of as fast as 70 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus conten- tion, the device has separate chip enable (CE#) and output enable (OE#) controls. AMD’s Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The Am28F020A uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. T he A m2 8 F0 20A i s c o mp ati bl e w i t h th e AM D Am28F256A, Am28F512A, and Am28F010A Flash memories. All devices in the Am28Fxxx family follow the JEDEC 32-pin pinout standard. In addition, all devices within this family that offer Embedded Algo- rithms use the same command set. Th is o ffe rs designers the flexibility to retain the same device foot- print and command set, at any density between 256 Kbits and 2 Mbits. AMD’s Flash technology reliably stores memory con- tents even after 100,000 erase and program cycles. The AMD cell is designed to optimize the erase and programming mechanisms. In addition, the combina- tion of advanced tunnel oxide processing and low internal electric fields for erase and programming oper- ations produces reliable cycling. The Am28F020A uses a 12.0 ±5% V PP supply input to perform the erase and programming functions. The highest degree of latch-up protection is achieved with AMD’s proprietary non-epi process. Latch-up pro- tection is provided for stresses up to 100 mA on address and data pins from –1 V to VCC +1 V. AMD’s Flash technology combines years of EPROM and EEPROM experience to produce the highest levels of quality, reliability, and cost effectiveness. The Am28F020A electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the EPROM programming mechanism of hot electron injection. |
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